JPS5745229A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5745229A
JPS5745229A JP55121347A JP12134780A JPS5745229A JP S5745229 A JPS5745229 A JP S5745229A JP 55121347 A JP55121347 A JP 55121347A JP 12134780 A JP12134780 A JP 12134780A JP S5745229 A JPS5745229 A JP S5745229A
Authority
JP
Japan
Prior art keywords
layer
metal layer
plated
under
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55121347A
Other languages
Japanese (ja)
Inventor
Manabu Watase
Michihiro Kobiki
Kazuaki Segawa
Takeshi Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55121347A priority Critical patent/JPS5745229A/en
Publication of JPS5745229A publication Critical patent/JPS5745229A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Abstract

PURPOSE:To prevent the decrease in smoothness of a plated surface for the subject semiconductor device by a method wherein the first metal layer is formed on the electrode provided on a semiconductor substrate and an electrolytic plated metal layer is formed using the tripple layer, having an aperture, provided on the first metal layer as a mask. CONSTITUTION:A source electrode 3 is provided on the N type GaAs layer 2 formed on the semiinsulated GaAs substrate 1, an under-plating metal layer 10 and an underlaid metal layer 4 are provided, and after a metal layer 5 formed under electrolytic plating and a surface resist layer were provided and an aperture was formed, a thick plated layer 7 is formed on the exposed under-plating metal layer 10, and then the resist 6, the metal layer 5 and a resist 4 are removed successively by performing an etching. Through these procedures wherein the under layer is removed using the etchant with which no plated metal will be corroded, the decrease in smoothness of the plated surface can be prevented and also the adhesive strength can be improved when a plated layer is thermo-press welded on the substrate.
JP55121347A 1980-09-01 1980-09-01 Manufacture of semiconductor device Pending JPS5745229A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55121347A JPS5745229A (en) 1980-09-01 1980-09-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55121347A JPS5745229A (en) 1980-09-01 1980-09-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5745229A true JPS5745229A (en) 1982-03-15

Family

ID=14809017

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55121347A Pending JPS5745229A (en) 1980-09-01 1980-09-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5745229A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163674A (en) * 1978-06-15 1979-12-26 Nippon Electric Co Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54163674A (en) * 1978-06-15 1979-12-26 Nippon Electric Co Semiconductor device

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