JPS574137A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS574137A JPS574137A JP7816480A JP7816480A JPS574137A JP S574137 A JPS574137 A JP S574137A JP 7816480 A JP7816480 A JP 7816480A JP 7816480 A JP7816480 A JP 7816480A JP S574137 A JPS574137 A JP S574137A
- Authority
- JP
- Japan
- Prior art keywords
- film
- oxide film
- nitriding
- side section
- field
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
- H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
PURPOSE:To prevent the rising and the expansion in the lateral direction of an oxide film isolation layer by a method wherein an anisotropic etching is performed on the aperture section of the mask consisting of an oxide film and a nitriding film, a thin oxide film is provided on the etched side section and then an oxidation treatment is performed. CONSTITUTION:The thin oxide film 12 and the nitriding film 13 are formed on the Si substrate 11, consisting of a (100) face, in the process of formation of a field oxide film which will be used for separation of elements of MOSIC, for example. Then, the nitriding film 13 and the oxide film 12 located on the field section are removed and after the side section of the substrate 11 has been turned to a (111) face by performing an anisotropic etching, a thermal nitriding film 14 is formed by heating the above in NH3. Then, a thin (20Angstrom or thereabouts) nitriding film 141 is remained on the thickly formed side section by performing a plasma etching and subsequently, a field film 15 is formed by performing an oxidation by heat. Through these procedures, no rising is generated on the isolation oxide film layer 15 and the breaking of wires and the like can be prevented. Also, as the layer 15 is not expanded in lateral direction, a highly integrated IC can be obtained.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7816480A JPS574137A (en) | 1980-06-10 | 1980-06-10 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7816480A JPS574137A (en) | 1980-06-10 | 1980-06-10 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS574137A true JPS574137A (en) | 1982-01-09 |
Family
ID=13654283
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7816480A Pending JPS574137A (en) | 1980-06-10 | 1980-06-10 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS574137A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6207539B1 (en) | 1996-12-27 | 2001-03-27 | Nec Corporation | Semiconductor device having field isolating film of which upper surface is flat and method thereof |
-
1980
- 1980-06-10 JP JP7816480A patent/JPS574137A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6207539B1 (en) | 1996-12-27 | 2001-03-27 | Nec Corporation | Semiconductor device having field isolating film of which upper surface is flat and method thereof |
KR100399084B1 (en) * | 1996-12-27 | 2004-02-11 | 닛뽕덴끼 가부시끼가이샤 | Semiconductor device having a field-shielding film whose top surface is flat and method of manufacturing the same |
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