JPS5737852A - Semiconductor integrated circuit and programming method for said circuit - Google Patents

Semiconductor integrated circuit and programming method for said circuit

Info

Publication number
JPS5737852A
JPS5737852A JP11351280A JP11351280A JPS5737852A JP S5737852 A JPS5737852 A JP S5737852A JP 11351280 A JP11351280 A JP 11351280A JP 11351280 A JP11351280 A JP 11351280A JP S5737852 A JPS5737852 A JP S5737852A
Authority
JP
Japan
Prior art keywords
layer
circuit
wiring
high resistance
connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11351280A
Other languages
Japanese (ja)
Other versions
JPS5843907B2 (en
Inventor
Osamu Minato
Toshiaki Masuhara
Yoshio Sakai
Katsuhiro Shimohigashi
Hiroo Masuda
Hideo Sunami
Yoshiaki Kamigaki
Eiji Takeda
Yoshimune Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55113512A priority Critical patent/JPS5843907B2/en
Priority to DE3036869A priority patent/DE3036869C2/en
Priority to US06/192,869 priority patent/US4455495A/en
Publication of JPS5737852A publication Critical patent/JPS5737852A/en
Publication of JPS5843907B2 publication Critical patent/JPS5843907B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76886Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances
    • H01L21/76892Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern
    • H01L21/76894Modifying permanently or temporarily the pattern or the conductivity of conductive members, e.g. formation of alloys, reduction of contact resistances modifying the pattern using a laser, e.g. laser cutting, laser direct writing, laser repair
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Read Only Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the degree of freedom of circuit wiring, to facilitate connection and to enhance reliability by forming a semiconductor layer, in which two low resistance sections are disposed facing to each other through a high resistance section, and introducing impurities from an impurity source adjacently arranged to the high resistance section. CONSTITUTION:The wiring consisting of layers such as N<+> type poly Si layers 103, 105 with low resistance are disposed onto a substrate 100, on which the circuit is shaped, through an insulating film 101 adjacent to the N<-> layer (or i layer) 104 with high resistance. The surface with this structure is coated with a film such as a PSG film 102, beams such as laser beams are irradiated from an upper section of the high resistance layer 104, and the N<-> layer (or the i layer) 104 is changed into an N layer 107 with low resistance, thus connecting the wiring 103, 105. Accordingly, the circuit can be connected by a small irradiation energy, the connection is jointly used with the cutting of the wiring layer and a PN junction is shaped through connection. Consequently, the degree of freedom of program wiring can be increased largely.
JP55113512A 1979-10-01 1980-08-20 Semiconductor integrated circuit and its circuit programming method Expired JPS5843907B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP55113512A JPS5843907B2 (en) 1980-08-20 1980-08-20 Semiconductor integrated circuit and its circuit programming method
DE3036869A DE3036869C2 (en) 1979-10-01 1980-09-30 Semiconductor integrated circuit and circuit activation method
US06/192,869 US4455495A (en) 1979-10-01 1980-10-01 Programmable semiconductor integrated circuitry including a programming semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55113512A JPS5843907B2 (en) 1980-08-20 1980-08-20 Semiconductor integrated circuit and its circuit programming method

Publications (2)

Publication Number Publication Date
JPS5737852A true JPS5737852A (en) 1982-03-02
JPS5843907B2 JPS5843907B2 (en) 1983-09-29

Family

ID=14614209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55113512A Expired JPS5843907B2 (en) 1979-10-01 1980-08-20 Semiconductor integrated circuit and its circuit programming method

Country Status (1)

Country Link
JP (1) JPS5843907B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5910859A (en) * 1996-10-01 1999-06-08 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US5978137A (en) * 1996-10-01 1999-11-02 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6369946B1 (en) 1999-09-08 2002-04-09 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6384976B1 (en) 1999-09-28 2002-05-07 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6414793B1 (en) 1999-09-21 2002-07-02 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6549337B2 (en) 1995-01-19 2003-04-15 Canon Kabushiki Kaisha Binoculars having objectives spaced apart at a fixed distance and adjustable eyepieces
EP2801856A1 (en) 2013-04-24 2014-11-12 Kamakura Koki Co., Ltd Optical image stabilizer

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6549337B2 (en) 1995-01-19 2003-04-15 Canon Kabushiki Kaisha Binoculars having objectives spaced apart at a fixed distance and adjustable eyepieces
US5910859A (en) * 1996-10-01 1999-06-08 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US5978137A (en) * 1996-10-01 1999-11-02 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6369946B1 (en) 1999-09-08 2002-04-09 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6414793B1 (en) 1999-09-21 2002-07-02 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6384976B1 (en) 1999-09-28 2002-05-07 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
US6515799B2 (en) * 1999-09-28 2003-02-04 Fuji Photo Optical Co., Ltd. Image stabilizing apparatus
EP2801856A1 (en) 2013-04-24 2014-11-12 Kamakura Koki Co., Ltd Optical image stabilizer

Also Published As

Publication number Publication date
JPS5843907B2 (en) 1983-09-29

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