JPS57153437A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57153437A
JPS57153437A JP3788981A JP3788981A JPS57153437A JP S57153437 A JPS57153437 A JP S57153437A JP 3788981 A JP3788981 A JP 3788981A JP 3788981 A JP3788981 A JP 3788981A JP S57153437 A JPS57153437 A JP S57153437A
Authority
JP
Japan
Prior art keywords
film
substrate
psg
psg film
coated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3788981A
Other languages
Japanese (ja)
Inventor
Tadashi Mori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP3788981A priority Critical patent/JPS57153437A/en
Publication of JPS57153437A publication Critical patent/JPS57153437A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain a PSG film having high wetproof property by irradiating laser beams, which lose approximately their energy in the PSG film, to the PSG film when an Al metal wiring layer is formed onto a Si substrate and the upper section of the wiring layer is protected by the PSG film. CONSTITUTION:A thick field oxide film 22 is shaped to the circumferential section of the P type Si substrate 21, the surface of the substrate 21 surrounded by the oxide film is coated with a thin gate oxide film 23, and a polycrystal Si gate electrode 24 is formed onto the oxide film 23 by patterning the film 23. N type source and drain regions 25 are diffused and shaped into the substrate 21 at both sides of the electrode 24 while using the electrode 24 as a mask, and the whole surface containing the regions 25 is coated with the first PSG film 26. Holes 27 are bored to the film 26, the Al wiring layers 28 contacting with the regions 25 are formed, and the whole surface is coated with the second PSG film 29 containing 2-5wt% P through a normal method. The film 29 is annealed by irradiating the CO2 laser beams 30 having a 10.6mum wavelength, energy thereof is absorbed approximately in the film 29. Accordingly, the wetproof property of the PSG film is improved without having no effect on the characteristics of an element.
JP3788981A 1981-03-18 1981-03-18 Manufacture of semiconductor device Pending JPS57153437A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3788981A JPS57153437A (en) 1981-03-18 1981-03-18 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3788981A JPS57153437A (en) 1981-03-18 1981-03-18 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57153437A true JPS57153437A (en) 1982-09-22

Family

ID=12510099

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3788981A Pending JPS57153437A (en) 1981-03-18 1981-03-18 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57153437A (en)

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