JPS5736329A - Input/output circuit - Google Patents

Input/output circuit

Info

Publication number
JPS5736329A
JPS5736329A JP11124980A JP11124980A JPS5736329A JP S5736329 A JPS5736329 A JP S5736329A JP 11124980 A JP11124980 A JP 11124980A JP 11124980 A JP11124980 A JP 11124980A JP S5736329 A JPS5736329 A JP S5736329A
Authority
JP
Japan
Prior art keywords
output
input
signal
trt3
fff3
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11124980A
Other languages
Japanese (ja)
Other versions
JPS6037922B2 (en
Inventor
Takao Kamirei
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55111249A priority Critical patent/JPS6037922B2/en
Publication of JPS5736329A publication Critical patent/JPS5736329A/en
Publication of JPS6037922B2 publication Critical patent/JPS6037922B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microcomputers (AREA)
  • Dc Digital Transmission (AREA)

Abstract

PURPOSE:To stabilize the input status of an I/O terminal by inhibiting conduction to an output transistor and preventing ineffective excess current from flowing to the I/O terminal. CONSTITUTION:When level ''1'' is outputted to a contact O2 used for input and output in common, an output control signal I4 sets up flip flops (FF) F2 and F3 and, if the output O2 of FFF2 and the inversion Q are ''1'' and ''O'' respectively, the output transistor (TR) T4 is interrupted. If both the output control signal I4 and FFF3 are ''1'', the TRT3 can output ''1'' during the period that the signal I4 is ''1''. When the contact O2 is used for input, an external TRQ4 is conducted and when ''0'' is inputted, an OR gate G4 becomes ''0'' and the output Q3 of FFF3 is set to ''0''. Thus, the signal I4 becomes to ''1'' and the AND gate G is closed, so that the TRT3 is forcedly interrupted and a current line is not formed.
JP55111249A 1980-08-13 1980-08-13 Input/output circuit Expired JPS6037922B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55111249A JPS6037922B2 (en) 1980-08-13 1980-08-13 Input/output circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55111249A JPS6037922B2 (en) 1980-08-13 1980-08-13 Input/output circuit

Publications (2)

Publication Number Publication Date
JPS5736329A true JPS5736329A (en) 1982-02-27
JPS6037922B2 JPS6037922B2 (en) 1985-08-29

Family

ID=14556374

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55111249A Expired JPS6037922B2 (en) 1980-08-13 1980-08-13 Input/output circuit

Country Status (1)

Country Link
JP (1) JPS6037922B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2527801A1 (en) * 1982-05-25 1983-12-02 Sony Corp MULTI-DIRECTIONAL CONTROL REMOTE CONTROL APPARATUS

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2527801A1 (en) * 1982-05-25 1983-12-02 Sony Corp MULTI-DIRECTIONAL CONTROL REMOTE CONTROL APPARATUS

Also Published As

Publication number Publication date
JPS6037922B2 (en) 1985-08-29

Similar Documents

Publication Publication Date Title
JPS57109089A (en) Initial value resetting circuit for operational amplifier
JPS52113758A (en) Electro-optical device
GB1236897A (en) Improvements in or relating to compensating circuits
JPS5736329A (en) Input/output circuit
JPS5544238A (en) Signal switching circuit
JPS56112123A (en) Input circuit
JPS5735456A (en) Ring trip circuit
JPS5787627A (en) Exclusive or circuit and exclusive nor circuit for display body driving circuit
JPS5566012A (en) Input signal circuit
GB1484733A (en) Squaring and to square rooting electrical circuits
JPS54148365A (en) Buffer circuit
JPS57106266A (en) Discriminating reproducing circuit
JPS5793721A (en) Schmitt circuit
JPS56152381A (en) Special effect device
JPS5415644A (en) Bias circuit
JPS5373939A (en) Comparison circuit
JPS5463617A (en) Input circuit
JPS57194378A (en) Test circuit of electronic clock
JPS54159154A (en) Latch circuit
JPS55136725A (en) Semiconductor logic circuit
JPS5754427A (en) Input circuit
JPS5684026A (en) Unstable-level eliminating circuit
JPS55100735A (en) Oscillation circuit
JPS56162539A (en) Signal-line driving circuit
JPS57101927A (en) Input/output circuit of microcomputer