JPS5728351A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS5728351A
JPS5728351A JP10341980A JP10341980A JPS5728351A JP S5728351 A JPS5728351 A JP S5728351A JP 10341980 A JP10341980 A JP 10341980A JP 10341980 A JP10341980 A JP 10341980A JP S5728351 A JPS5728351 A JP S5728351A
Authority
JP
Japan
Prior art keywords
type
layer
resistor
epitaxial layer
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10341980A
Other languages
Japanese (ja)
Inventor
Nobuo Uematsu
Koichi Tanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10341980A priority Critical patent/JPS5728351A/en
Publication of JPS5728351A publication Critical patent/JPS5728351A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/8605Resistors with PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve the static electrical break-down strength of a resistor by not forming a reverse-conductin type buried layer in the lower part of a contact region directly connected to an outer terminal in the diffused resistor of the same conductiveity type as a substrate, which is formed in an epitaxial layer. CONSTITUTION:For example, an N<+> type buried layer 4 s formed on a P type substrate to form an N type epitaxial layer 2. Then an element is formed in the island region separated by an insulated layer 9 to form a circuit. When a resistor consisting of a P type diffused layer 3 is to be provided in the epitaxial layer 2, for the resistor 3 connected to an outside terminal 8, buried layer 4 is not formed (a part or the whole thereof is removed) below the contact 6 on the side of the outside terminal 8. Thus it is possible to obtain the substantially same effect as obtained by forming the epitaxial layer 2 thickly. Accordingly, the static bread-through strength can be improved.
JP10341980A 1980-07-28 1980-07-28 Semiconductor integrated circuit device Pending JPS5728351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10341980A JPS5728351A (en) 1980-07-28 1980-07-28 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10341980A JPS5728351A (en) 1980-07-28 1980-07-28 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS5728351A true JPS5728351A (en) 1982-02-16

Family

ID=14353515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10341980A Pending JPS5728351A (en) 1980-07-28 1980-07-28 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5728351A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213458A (en) * 1982-06-04 1983-12-12 Nec Corp Semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840307A (en) * 1971-09-23 1973-06-13
JPS4913092U (en) * 1972-05-11 1974-02-04

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4840307A (en) * 1971-09-23 1973-06-13
JPS4913092U (en) * 1972-05-11 1974-02-04

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58213458A (en) * 1982-06-04 1983-12-12 Nec Corp Semiconductor device
JPH0460350B2 (en) * 1982-06-04 1992-09-25 Nippon Electric Co

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