JPS5728341A - Manufacture of semiconductor integrated circuit - Google Patents
Manufacture of semiconductor integrated circuitInfo
- Publication number
- JPS5728341A JPS5728341A JP10334180A JP10334180A JPS5728341A JP S5728341 A JPS5728341 A JP S5728341A JP 10334180 A JP10334180 A JP 10334180A JP 10334180 A JP10334180 A JP 10334180A JP S5728341 A JPS5728341 A JP S5728341A
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline
- layer
- groove
- grooves
- selective etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To obtain a plain separate construction of polycrystalline Si, by a method wherein a substrate provided with V-shaped grooves is subjected to such processes as deposition of a polycrystalline Si layer, selective introduction of B into the polycrystalline Si in the groove part, and selective etching of polycrystalline Si unadded with B successively twice. CONSTITUTION:The V grooves 4 (about 1mu deep) are formed by etching anisotropically, for example, a (100) face P type Si substrate 1 to obtain an oxide film 5 (about 4,000Angstrom ) on its top surface. Next, a polycrystalline Si layer 6 (about 2,000 Angstrom ) is deposited, and B ions are implanted into the polycrystalline layer at the grooves 4 with an energy strong enough for the ions to penetrate through the polycrystalline Si layer in the flat parts. After a heat treatment, a selective etching is carried out with a KOH solution to leave a B-added polycrystalline layer 7 in each groove 4. Then, a polycrystalline Si layer 8 of volume and thickness enough to fill the groove part is provided. This is heat-treated to diffuse the B-added region, and selective etching is performed again to leave a polycrystalline layer 9 in each groove where B has been diffused to obtain a separating region between elemtnts. Thus a plain and separated structure can be formed in the deposited polycrystalline Si layer without any mechanical grinding or the like, and a larger-scale integration of ICs and high yield can be obtained.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10334180A JPS5728341A (en) | 1980-07-28 | 1980-07-28 | Manufacture of semiconductor integrated circuit |
DE19813129558 DE3129558A1 (en) | 1980-07-28 | 1981-07-27 | METHOD FOR PRODUCING AN INTEGRATED SEMICONDUCTOR CIRCUIT |
US06/507,557 US4507849A (en) | 1980-07-28 | 1983-06-24 | Method of making isolation grooves by over-filling with polycrystalline silicon having a difference in impurity concentration inside the grooves followed by etching off the overfill based upon this difference |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10334180A JPS5728341A (en) | 1980-07-28 | 1980-07-28 | Manufacture of semiconductor integrated circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5728341A true JPS5728341A (en) | 1982-02-16 |
JPS619736B2 JPS619736B2 (en) | 1986-03-25 |
Family
ID=14351434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10334180A Granted JPS5728341A (en) | 1980-07-28 | 1980-07-28 | Manufacture of semiconductor integrated circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5728341A (en) |
-
1980
- 1980-07-28 JP JP10334180A patent/JPS5728341A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS619736B2 (en) | 1986-03-25 |
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