JPS5726930A - Odd-number frequency division circuit - Google Patents

Odd-number frequency division circuit

Info

Publication number
JPS5726930A
JPS5726930A JP10122980A JP10122980A JPS5726930A JP S5726930 A JPS5726930 A JP S5726930A JP 10122980 A JP10122980 A JP 10122980A JP 10122980 A JP10122980 A JP 10122980A JP S5726930 A JPS5726930 A JP S5726930A
Authority
JP
Japan
Prior art keywords
flip
flop
delay
odd
frequency division
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10122980A
Other languages
Japanese (ja)
Inventor
Toshiichi Yamakawa
Takeo Fukushima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10122980A priority Critical patent/JPS5726930A/en
Publication of JPS5726930A publication Critical patent/JPS5726930A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K23/00Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/50Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits
    • H03K23/502Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two
    • H03K23/505Gating or clocking signals applied to all stages, i.e. synchronous counters using bi-stable regenerative trigger circuits with a base or a radix other than a power of two with a base which is an odd number

Landscapes

  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To make the duty cycle completely at 50%, by logical operation between a signal frequency dividing an input clock signal and a delay signal formed through inversion of an input clock signal. CONSTITUTION:A D flip-flop DF1 is set to a high level at the leading of an input signal CLK and D flip-flops DF2, DF3 are set with a delay of every one period sequentially. When the D flip-flop DF3 is set, the input of the NAND gate G1 is at high level, the D flip-flop DF1 is at low level, and the D flip-flops DF2, DF3 are reset with a delay of every one period sequentially.
JP10122980A 1980-07-25 1980-07-25 Odd-number frequency division circuit Pending JPS5726930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10122980A JPS5726930A (en) 1980-07-25 1980-07-25 Odd-number frequency division circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10122980A JPS5726930A (en) 1980-07-25 1980-07-25 Odd-number frequency division circuit

Publications (1)

Publication Number Publication Date
JPS5726930A true JPS5726930A (en) 1982-02-13

Family

ID=14295060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10122980A Pending JPS5726930A (en) 1980-07-25 1980-07-25 Odd-number frequency division circuit

Country Status (1)

Country Link
JP (1) JPS5726930A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399549A (en) * 1981-08-18 1983-08-16 Zenith Radio Corporation Odd number frequency division with symmetrical output
JPS60227521A (en) * 1984-04-25 1985-11-12 Matsushita Electric Ind Co Ltd 2/3-frequency dividing circuit
JPS62107524A (en) * 1985-11-05 1987-05-18 Sony Corp Digital-analog converter
JPS6379420A (en) * 1986-09-22 1988-04-09 Nec Corp Odd number frequency divider
JPH0341823A (en) * 1989-07-07 1991-02-22 Mitsubishi Electric Corp Frequency divider
EP0656691A2 (en) * 1993-12-01 1995-06-07 Siemens Aktiengesellschaft Circuit device providing a symmetrical duty cycle
US5438600A (en) * 1992-12-03 1995-08-01 Fujitsu Limited Odd-number frequency divider and method of constituting the same
WO2006016310A2 (en) 2004-08-06 2006-02-16 Koninklijke Philips Electronics N.V. Frequency divider

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4399549A (en) * 1981-08-18 1983-08-16 Zenith Radio Corporation Odd number frequency division with symmetrical output
JPS60227521A (en) * 1984-04-25 1985-11-12 Matsushita Electric Ind Co Ltd 2/3-frequency dividing circuit
JPS62107524A (en) * 1985-11-05 1987-05-18 Sony Corp Digital-analog converter
JPH0746773B2 (en) * 1985-11-05 1995-05-17 ソニー株式会社 D / A converter
JPS6379420A (en) * 1986-09-22 1988-04-09 Nec Corp Odd number frequency divider
JPH0341823A (en) * 1989-07-07 1991-02-22 Mitsubishi Electric Corp Frequency divider
US5438600A (en) * 1992-12-03 1995-08-01 Fujitsu Limited Odd-number frequency divider and method of constituting the same
EP0656691A2 (en) * 1993-12-01 1995-06-07 Siemens Aktiengesellschaft Circuit device providing a symmetrical duty cycle
WO2006016310A2 (en) 2004-08-06 2006-02-16 Koninklijke Philips Electronics N.V. Frequency divider
WO2006016310A3 (en) * 2004-08-06 2006-04-27 Koninkl Philips Electronics Nv Frequency divider

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