JPS57212542A - Multiplying circuit - Google Patents

Multiplying circuit

Info

Publication number
JPS57212542A
JPS57212542A JP9771981A JP9771981A JPS57212542A JP S57212542 A JPS57212542 A JP S57212542A JP 9771981 A JP9771981 A JP 9771981A JP 9771981 A JP9771981 A JP 9771981A JP S57212542 A JPS57212542 A JP S57212542A
Authority
JP
Japan
Prior art keywords
multiplier
mpy
data
circuit
directly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9771981A
Other languages
English (en)
Inventor
Tsutomu Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP9771981A priority Critical patent/JPS57212542A/ja
Publication of JPS57212542A publication Critical patent/JPS57212542A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/52—Multiplying; Dividing
    • G06F7/523—Multiplying only
    • G06F7/527—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel
    • G06F7/5272—Multiplying only in serial-parallel fashion, i.e. one operand being entered serially and the other in parallel with row wise addition of partial products

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
JP9771981A 1981-06-24 1981-06-24 Multiplying circuit Pending JPS57212542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9771981A JPS57212542A (en) 1981-06-24 1981-06-24 Multiplying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9771981A JPS57212542A (en) 1981-06-24 1981-06-24 Multiplying circuit

Publications (1)

Publication Number Publication Date
JPS57212542A true JPS57212542A (en) 1982-12-27

Family

ID=14199696

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9771981A Pending JPS57212542A (en) 1981-06-24 1981-06-24 Multiplying circuit

Country Status (1)

Country Link
JP (1) JPS57212542A (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140463A (ja) * 1983-12-06 1985-07-25 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 集積化データ処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140463A (ja) * 1983-12-06 1985-07-25 エヌ・ベー・フイリツプス・フルーイランペンフアブリケン 集積化データ処理装置

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