JPS57197603A - Digital input device - Google Patents

Digital input device

Info

Publication number
JPS57197603A
JPS57197603A JP8211681A JP8211681A JPS57197603A JP S57197603 A JPS57197603 A JP S57197603A JP 8211681 A JP8211681 A JP 8211681A JP 8211681 A JP8211681 A JP 8211681A JP S57197603 A JPS57197603 A JP S57197603A
Authority
JP
Japan
Prior art keywords
control
input signals
digital input
sampling
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8211681A
Other languages
Japanese (ja)
Inventor
Kazuo Imayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8211681A priority Critical patent/JPS57197603A/en
Publication of JPS57197603A publication Critical patent/JPS57197603A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/05—Digital input using the sampling of an analogue quantity at regular intervals of time, input from a/d converter or output to d/a converter

Abstract

PURPOSE:To execute control having reliability and the same level property, by storing plural digital input signals temporarily in a holding circuit by a sampling function means, using its output for the sequence processing. CONSTITUTION:The figure shows a digital input device of sequence control. F1-F2 are holding circuits for temporarily storing digital input signals D1-Dn from each process, and are provided in accordance with the signals D1-Dn. The input signals D1-Dn are stored by a sampling instruction SC. A CPU receives output data DA1-DAn from the holding circuits F1-Fn, executes its control, and also sends out a sampling instruction prior to execution processing of its sequence control. According to said constitution, plural input signals become outputs having the same level property in the sampling period, and even if a level of the input signal is varied on the way, no contradiction of logic is generated, and malfunction of control can be prevented.
JP8211681A 1981-05-29 1981-05-29 Digital input device Pending JPS57197603A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8211681A JPS57197603A (en) 1981-05-29 1981-05-29 Digital input device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8211681A JPS57197603A (en) 1981-05-29 1981-05-29 Digital input device

Publications (1)

Publication Number Publication Date
JPS57197603A true JPS57197603A (en) 1982-12-03

Family

ID=13765434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8211681A Pending JPS57197603A (en) 1981-05-29 1981-05-29 Digital input device

Country Status (1)

Country Link
JP (1) JPS57197603A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59126304U (en) * 1983-02-10 1984-08-25 株式会社エスジ− Interface device for providing detection data to the sequencer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59126304U (en) * 1983-02-10 1984-08-25 株式会社エスジ− Interface device for providing detection data to the sequencer

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