JPS5716486A - Graphic information memory and display device - Google Patents

Graphic information memory and display device

Info

Publication number
JPS5716486A
JPS5716486A JP5638281A JP5638281A JPS5716486A JP S5716486 A JPS5716486 A JP S5716486A JP 5638281 A JP5638281 A JP 5638281A JP 5638281 A JP5638281 A JP 5638281A JP S5716486 A JPS5716486 A JP S5716486A
Authority
JP
Japan
Prior art keywords
display device
information memory
graphic information
graphic
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5638281A
Other languages
English (en)
Other versions
JPS6235679B2 (ja
Inventor
Shiyuuto Deiiteru
Shiyuenguraa Manfuretsudo
Yuuranto Haatomiyuuto
Baisu Herumuuto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS5716486A publication Critical patent/JPS5716486A/ja
Publication of JPS6235679B2 publication Critical patent/JPS6235679B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0207—Addressing or allocation; Relocation with multidimensional access, e.g. row/column, matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Digital Computer Display Output (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Analysis (AREA)
JP5638281A 1980-04-19 1981-04-16 Graphic information memory and display device Granted JPS5716486A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19803015125 DE3015125A1 (de) 1980-04-19 1980-04-19 Einrichtung zur speicherung und darstellung graphischer information

Publications (2)

Publication Number Publication Date
JPS5716486A true JPS5716486A (en) 1982-01-27
JPS6235679B2 JPS6235679B2 (ja) 1987-08-03

Family

ID=6100464

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5638281A Granted JPS5716486A (en) 1980-04-19 1981-04-16 Graphic information memory and display device

Country Status (5)

Country Link
US (1) US4442503A (ja)
EP (1) EP0038411B1 (ja)
JP (1) JPS5716486A (ja)
CA (1) CA1189992A (ja)
DE (2) DE3015125A1 (ja)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59106066A (ja) * 1982-12-10 1984-06-19 Hitachi Ltd 図形処理装置
JPS60191293A (ja) * 1984-03-12 1985-09-28 ダイキン工業株式会社 Ｃｒｔデイスプレイ装置の高速直線補間回路
JPS6146978A (ja) * 1984-08-10 1986-03-07 横河電機株式会社 Ｃｒｔ表示装置
JPS61123875A (ja) * 1984-11-20 1986-06-11 富士通株式会社 半導体記憶装置
JPS61149989A (ja) * 1984-12-25 1986-07-08 富士通株式会社 半導体記憶装置

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3141882A1 (de) * 1981-10-22 1983-05-05 Agfa-Gevaert Ag, 5090 Leverkusen Dynamische schreib- und lesespeichervorrichtung
US4546451A (en) * 1982-02-12 1985-10-08 Metheus Corporation Raster graphics display refresh memory architecture offering rapid access speed
US4667190A (en) * 1982-07-30 1987-05-19 Honeywell Inc. Two axis fast access memory
US4727474A (en) * 1983-02-18 1988-02-23 Loral Corporation Staging memory for massively parallel processor
SE448789B (sv) * 1983-03-29 1987-03-16 Ericsson Telefon Ab L M Anordning for att i ett datorstyrt presentationssystem generera bilder i raster pa en bildskerm
US4630230A (en) * 1983-04-25 1986-12-16 Cray Research, Inc. Solid state storage device
JPS603036A (ja) * 1983-06-20 1985-01-09 Hitachi Ltd 処理履歴情報の取得・参照方式
US4559611A (en) * 1983-06-30 1985-12-17 International Business Machines Corporation Mapping and memory hardware for writing horizontal and vertical lines
US4679038A (en) * 1983-07-18 1987-07-07 International Business Machines Corporation Band buffer display system
US4620288A (en) * 1983-10-26 1986-10-28 American Semiconductor Equipment Technologies Data handling system for a pattern generator
US4648049A (en) * 1984-05-07 1987-03-03 Advanced Micro Devices, Inc. Rapid graphics bit mapping circuit and method
US4663729A (en) * 1984-06-01 1987-05-05 International Business Machines Corp. Display architecture having variable data width
US4740927A (en) * 1985-02-13 1988-04-26 International Business Machines Corporation Bit addressable multidimensional array
US4860248A (en) * 1985-04-30 1989-08-22 Ibm Corporation Pixel slice processor with frame buffers grouped according to pixel bit width
US4796222A (en) * 1985-10-28 1989-01-03 International Business Machines Corporation Memory structure for nonsequential storage of block bytes in multi-bit chips
US4992979A (en) * 1985-10-28 1991-02-12 International Business Machines Corporation Memory structure for nonsequential storage of block bytes in multi bit chips
JPS62103893A (ja) * 1985-10-30 1987-05-14 Toshiba Corp 半導体メモリ及び半導体メモリシステム
IT1184013B (it) * 1985-12-13 1987-10-22 Elsag Memoria ad elevata capacita accessibile a diverse agenti
KR910008460B1 (ko) * 1986-12-25 1991-10-15 가부시키가이샤 도시바 정보처리장치
US4823286A (en) * 1987-02-12 1989-04-18 International Business Machines Corporation Pixel data path for high performance raster displays with all-point-addressable frame buffers
US4903217A (en) * 1987-02-12 1990-02-20 International Business Machines Corp. Frame buffer architecture capable of accessing a pixel aligned M by N array of pixels on the screen of an attached monitor
DE3710696A1 (de) * 1987-03-31 1988-11-10 Nixdorf Computer Ag Verfahren zum bearbeiten des speicherinhalts eines bildwiederholspeichers und schaltungsanordnung zur durchfuehrung des verfahrens
US5113507A (en) * 1988-10-20 1992-05-12 Universities Space Research Association Method and apparatus for a sparse distributed memory system
US5070466A (en) * 1988-11-01 1991-12-03 Honeywell Inc. Digital vector generator apparatus for providing mathematically precise vectors and symmetrical patterns
EP0798734B1 (en) * 1988-11-29 2004-02-18 Matsushita Electric Industrial Co., Ltd. A synchronous semiconductor memory integrated circuit, a method for accessing said memory and a system comprising such a memory
US5142638A (en) * 1989-02-07 1992-08-25 Cray Research, Inc. Apparatus for sharing memory in a multiprocessor system
US4951246A (en) * 1989-08-08 1990-08-21 Cray Research, Inc. Nibble-mode dram solid state storage device
DE68928980T2 (de) * 1989-11-17 1999-08-19 Texas Instruments Inc Multiprozessor mit Koordinatenschalter zwischen Prozessoren und Speichern
JPH087715B2 (ja) * 1990-11-15 1996-01-29 インターナショナル・ビジネス・マシーンズ・コーポレイション データ処理装置及びアクセス制御方法
US5652912A (en) * 1990-11-28 1997-07-29 Martin Marietta Corporation Versatile memory controller chip for concurrent input/output operations
JP3096362B2 (ja) * 1992-10-26 2000-10-10 沖電気工業株式会社 シリアルアクセスメモリ
US5861894A (en) * 1993-06-24 1999-01-19 Discovision Associates Buffer manager
US5561777A (en) * 1993-08-30 1996-10-01 Xerox Corporation Process for sequentially reading a page from an image memory in either of two directions
CA2145365C (en) * 1994-03-24 1999-04-27 Anthony M. Jones Method for accessing banks of dram
CA2145361C (en) * 1994-03-24 1999-09-07 Martin William Sotheran Buffer manager
US5798719A (en) * 1994-07-29 1998-08-25 Discovision Associates Parallel Huffman decoder
GB9417138D0 (en) * 1994-08-23 1994-10-12 Discovision Ass Data rate conversion
JP3342352B2 (ja) * 1997-07-04 2002-11-05 シャープ株式会社 表示用メモリ制御装置
US6028612A (en) * 1997-11-18 2000-02-22 Stmicroelectronics, Inc. Picture memory mapping to minimize memory bandwidth in compression and decompression of data sequences
US7366856B2 (en) 2004-10-13 2008-04-29 Ebay Inc. Method and system to locate a storage device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511030A (en) * 1974-06-10 1976-01-07 Ibm Zahyogatadeetakara rasutagatahyojioataerusochi
JPS53110331A (en) * 1977-03-08 1978-09-27 Seiko Instr & Electronics Ltd Picture memory write speed converter circuit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3893075A (en) * 1972-12-29 1975-07-01 Richard Orban Method and apparatus for digital scan conversion
FR2316693A1 (fr) * 1975-07-01 1977-01-28 Cit Alcatel Memoire numerique d'image
US4205389A (en) * 1976-09-24 1980-05-27 General Electric Company Apparatus for generating a raster image from line segments
US4203154A (en) * 1978-04-24 1980-05-13 Xerox Corporation Electronic image processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS511030A (en) * 1974-06-10 1976-01-07 Ibm Zahyogatadeetakara rasutagatahyojioataerusochi
JPS53110331A (en) * 1977-03-08 1978-09-27 Seiko Instr & Electronics Ltd Picture memory write speed converter circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59106066A (ja) * 1982-12-10 1984-06-19 Hitachi Ltd 図形処理装置
JPS60191293A (ja) * 1984-03-12 1985-09-28 ダイキン工業株式会社 Ｃｒｔデイスプレイ装置の高速直線補間回路
JPS6146978A (ja) * 1984-08-10 1986-03-07 横河電機株式会社 Ｃｒｔ表示装置
JPS61123875A (ja) * 1984-11-20 1986-06-11 富士通株式会社 半導体記憶装置
JPH0346832B2 (ja) * 1984-11-20 1991-07-17 Fujitsu Ltd
JPS61149989A (ja) * 1984-12-25 1986-07-08 富士通株式会社 半導体記憶装置
JPH0346833B2 (ja) * 1984-12-25 1991-07-17 Fujitsu Ltd

Also Published As

Publication number Publication date
DE3167134D1 (en) 1984-12-20
DE3015125A1 (de) 1981-10-22
EP0038411B1 (de) 1984-11-14
EP0038411A3 (en) 1981-12-30
EP0038411A2 (de) 1981-10-28
US4442503A (en) 1984-04-10
JPS6235679B2 (ja) 1987-08-03
CA1189992A (en) 1985-07-02

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