JPS57162446A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57162446A
JPS57162446A JP4745081A JP4745081A JPS57162446A JP S57162446 A JPS57162446 A JP S57162446A JP 4745081 A JP4745081 A JP 4745081A JP 4745081 A JP4745081 A JP 4745081A JP S57162446 A JPS57162446 A JP S57162446A
Authority
JP
Japan
Prior art keywords
polycrystalline
film
low resistance
layer
constitution
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4745081A
Other languages
Japanese (ja)
Inventor
Kazumasa Nawata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4745081A priority Critical patent/JPS57162446A/en
Publication of JPS57162446A publication Critical patent/JPS57162446A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To obtain easily wiring films having small step parts on a semiconductor device by a method wherein a polycrystalline Si layer having high resistance and a conductive film are laminated on an insulating film and on openings for electrodes on a semiconductor substrate, and selective laser irradiation is performed. CONSTITUTION:The prescribed openings are provided in the SiO2 film 12 on the Si substrate being formed with the prescribed diffusion layer, the polycrystalline Si layer 13 is formed on the whole surface by the CVD method, and Al 14 is evaporated on the whole surface. Then ND-YAG laser beam is irradiated thereon selectively to melt Al and polycrystalline Si, and conductive films 15 having low resistance are formed selectively. Then remaining Al 14 is etched to be removed by the HNO3 liquid, and high resistance regions 13 and low resistance regions 15 are formed in the polycrystalline Si film. By this constitution, the low resistance conductive films can be obtained only at the desired flat places having no step part, and the high density device necessitating multilayer wiring can be obtained easily.
JP4745081A 1981-03-31 1981-03-31 Manufacture of semiconductor device Pending JPS57162446A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4745081A JPS57162446A (en) 1981-03-31 1981-03-31 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4745081A JPS57162446A (en) 1981-03-31 1981-03-31 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57162446A true JPS57162446A (en) 1982-10-06

Family

ID=12775484

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4745081A Pending JPS57162446A (en) 1981-03-31 1981-03-31 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57162446A (en)

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