JPS57162346A - Manufacutre of insulating and isolating substrate - Google Patents

Manufacutre of insulating and isolating substrate

Info

Publication number
JPS57162346A
JPS57162346A JP4677181A JP4677181A JPS57162346A JP S57162346 A JPS57162346 A JP S57162346A JP 4677181 A JP4677181 A JP 4677181A JP 4677181 A JP4677181 A JP 4677181A JP S57162346 A JPS57162346 A JP S57162346A
Authority
JP
Japan
Prior art keywords
substrate
single crystal
polycrystalline
shaped grooves
films
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4677181A
Other languages
Japanese (ja)
Other versions
JPS6155251B2 (en
Inventor
Takanobu Satou
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
JIDOU KEISOKU GIJUTSU KENKIYUU
JIDOU KEISOKU GIJUTSU KENKIYUUKUMIAI
Original Assignee
JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
JIDOU KEISOKU GIJUTSU KENKIYUU
JIDOU KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI, JIDOU KEISOKU GIJUTSU KENKIYUU, JIDOU KEISOKU GIJUTSU KENKIYUUKUMIAI filed Critical JIDO KEISOKU GIJUTSU KENKIYUUKUMIAI
Priority to JP4677181A priority Critical patent/JPS57162346A/en
Publication of JPS57162346A publication Critical patent/JPS57162346A/en
Publication of JPS6155251B2 publication Critical patent/JPS6155251B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To prevent the warpage of a single crystal Si substrate by covering oxidized films on both front and rear surfaces including V-shaped grooves formed on both front and rear surfaces of the substrate, then alternately growing polycrystalline Si and oxidized films on both side surfaces, polishing the them and forming an island of single crystal Si. CONSTITUTION:V-shaped grooves are formed via oxidized films 21a, 21b on both front and rear surfaces of a single crystal Si substrate 20. Oxidized films 21 are covered on both side surfaces including the V-shaped grooves. Polycrystal Sis 23 are accumulated in a thickness of 400mum on the front surface side and 80mum on the back surface side. In this growing step, the growths of the polycrystalline Sis 23a, 23b are temporarily stopped, and films 25 having thermal expansion coefficients larger than the film 24 on the front side and larger than the film 35 on the back side are formed. Further, polycrystalline Si is grown, the substrate is then polished, thereby forming an island 20' of single crystal Si insulated and isolated. In this manner, the warpage of the substrate can be reduced.
JP4677181A 1981-03-30 1981-03-30 Manufacutre of insulating and isolating substrate Granted JPS57162346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4677181A JPS57162346A (en) 1981-03-30 1981-03-30 Manufacutre of insulating and isolating substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4677181A JPS57162346A (en) 1981-03-30 1981-03-30 Manufacutre of insulating and isolating substrate

Publications (2)

Publication Number Publication Date
JPS57162346A true JPS57162346A (en) 1982-10-06
JPS6155251B2 JPS6155251B2 (en) 1986-11-27

Family

ID=12756586

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4677181A Granted JPS57162346A (en) 1981-03-30 1981-03-30 Manufacutre of insulating and isolating substrate

Country Status (1)

Country Link
JP (1) JPS57162346A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6238935B1 (en) * 1994-04-07 2001-05-29 International Business Machines Corporation Silicon-on-insulator wafer having conductive layer for detection with electrical sensors

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6238935B1 (en) * 1994-04-07 2001-05-29 International Business Machines Corporation Silicon-on-insulator wafer having conductive layer for detection with electrical sensors

Also Published As

Publication number Publication date
JPS6155251B2 (en) 1986-11-27

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