JPS57162106A - Information processing controlling circuit - Google Patents
Information processing controlling circuitInfo
- Publication number
- JPS57162106A JPS57162106A JP4630181A JP4630181A JPS57162106A JP S57162106 A JPS57162106 A JP S57162106A JP 4630181 A JP4630181 A JP 4630181A JP 4630181 A JP4630181 A JP 4630181A JP S57162106 A JPS57162106 A JP S57162106A
- Authority
- JP
- Japan
- Prior art keywords
- data
- field
- readout
- data write
- controlling circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/09—Digital recording
Landscapes
- Signal Processing For Digital Recording And Reproducing (AREA)
Abstract
PURPOSE:To achieve constitution by an inexpensive IC of a TTL circuit by facilitating readout timing control by starting readout processing a prescribed time behind simultaneous byte data detection during data readout processing of an external storage device. CONSTITUTION:Data on the prescribed capacity of each field, such as the synchronizing byte data write field, data write field, and data buffer field of a sector format, is transferred from the address memory 31 of a format memory controlling circuit 27 to the selector 30 of a timing controlling cirucuit 26 on the start of every field, and the field is discriminated by a coincident signal which shows coincident with the count value data of a readout clock counter 28. Then if the detecting circuit of a readout controlling circuit 11 detects synchronizing byte data during the discrimination of the synchronizing byte data write field, reading operation for data in the data write field is inhibited for a prescribed time after the detection, thus delaying the start timing of reading operation.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4630181A JPS57162106A (en) | 1981-03-31 | 1981-03-31 | Information processing controlling circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4630181A JPS57162106A (en) | 1981-03-31 | 1981-03-31 | Information processing controlling circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57162106A true JPS57162106A (en) | 1982-10-05 |
Family
ID=12743372
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4630181A Pending JPS57162106A (en) | 1981-03-31 | 1981-03-31 | Information processing controlling circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57162106A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04195973A (en) * | 1990-11-28 | 1992-07-15 | Nec Corp | Magnetic disk device |
-
1981
- 1981-03-31 JP JP4630181A patent/JPS57162106A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04195973A (en) * | 1990-11-28 | 1992-07-15 | Nec Corp | Magnetic disk device |
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