JPS57140054A - Ami coding circuit - Google Patents
Ami coding circuitInfo
- Publication number
- JPS57140054A JPS57140054A JP2419781A JP2419781A JPS57140054A JP S57140054 A JPS57140054 A JP S57140054A JP 2419781 A JP2419781 A JP 2419781A JP 2419781 A JP2419781 A JP 2419781A JP S57140054 A JPS57140054 A JP S57140054A
- Authority
- JP
- Japan
- Prior art keywords
- gate
- output
- inputted
- terminal
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
- H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes
- H04L25/4925—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes using balanced bipolar ternary codes
Landscapes
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To decrease delay and to make the circuit scale small, by inputting an inverting output of an NAND gate and that of an exclusive OR gate to the 2nd AND gate. CONSTITUTION:An input signal 7 of NRZ code from a terminal 14 and a clock input signal from a terminal 15 are inputted to an NAND gate 16, and the output (d) is a clock input of a D-FF17. The counting of a mode 2 is stopped by taking an input signal (a) at a terminal 13 as 1, and the output (f) of an EX-OR gate 18 is the same state as stopped count with a leading of the clock (d). A signal inverting the output (d) of the gate 16 is multiply inputted to gates 21, 22, the output (f) of the gate 18 is inputted to the gate 21 and an inverted output (g) is inputted to the gate 22 and the outputs (i), (j) are inputted to a buffer circuit 23, then the output (k) becomes an output of an AMI coding circuit having the AMI rule violation generating function.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2419781A JPS57140054A (en) | 1981-02-23 | 1981-02-23 | Ami coding circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2419781A JPS57140054A (en) | 1981-02-23 | 1981-02-23 | Ami coding circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57140054A true JPS57140054A (en) | 1982-08-30 |
Family
ID=12131596
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2419781A Pending JPS57140054A (en) | 1981-02-23 | 1981-02-23 | Ami coding circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57140054A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6444651A (en) * | 1987-08-13 | 1989-02-17 | Matsushita Electric Works Ltd | Home bus system |
| JPH04131261U (en) * | 1991-05-27 | 1992-12-02 | ダイワゴルフ株式会社 | golf club head |
-
1981
- 1981-02-23 JP JP2419781A patent/JPS57140054A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6444651A (en) * | 1987-08-13 | 1989-02-17 | Matsushita Electric Works Ltd | Home bus system |
| JP2511469B2 (en) * | 1987-08-13 | 1996-06-26 | 松下電工株式会社 | Home bus system |
| JPH04131261U (en) * | 1991-05-27 | 1992-12-02 | ダイワゴルフ株式会社 | golf club head |
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