JPS57130454A - Chip carrier - Google Patents

Chip carrier

Info

Publication number
JPS57130454A
JPS57130454A JP1644881A JP1644881A JPS57130454A JP S57130454 A JPS57130454 A JP S57130454A JP 1644881 A JP1644881 A JP 1644881A JP 1644881 A JP1644881 A JP 1644881A JP S57130454 A JPS57130454 A JP S57130454A
Authority
JP
Japan
Prior art keywords
pads
parts
connection
main body
cover plate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1644881A
Other languages
Japanese (ja)
Inventor
Yukio Yamaguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1644881A priority Critical patent/JPS57130454A/en
Publication of JPS57130454A publication Critical patent/JPS57130454A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385Assembly of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

Abstract

PURPOSE:To insure connection of electronic parts formed in high density and to facilitate mounting of the parts to a wiring substrate by a method wherein pads for outside connection to be connected respectively with lead wires of the parts are provided in a lattice type on the outside face of a cover plate to cover the inside of the main body being put with the parts. CONSTITUTION:The electronic parts 24 is fixed with a connecting material 30 to the concave part of the main body 21 equipped with a heat sink 26, and the lead wires 25 of the parts 24 are connected to pads 23 on the circumferential convex part of the main body 21 through wirings 22. Pads 35 are provided on the inside face of a cover plate 33 at the position corresponding to the pads 23, and the respective pads 35 are connected to the pads 34 for outside connection on the outside face through the wirings and through-holes. After the pads 23, 35 are joined and the cover plate 33 is covered thereon, the pads 34 are connected to conductor circuits 29 of the multilayer wiring substrate 28 through metal balls 36, for example, and mounting is attained. By arranging the pads 34 for outside connection in the lattice type by this way, electrical connection of the minute parts arranged in high density and having plural lead wires can be performed surely.
JP1644881A 1981-02-06 1981-02-06 Chip carrier Pending JPS57130454A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1644881A JPS57130454A (en) 1981-02-06 1981-02-06 Chip carrier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1644881A JPS57130454A (en) 1981-02-06 1981-02-06 Chip carrier

Publications (1)

Publication Number Publication Date
JPS57130454A true JPS57130454A (en) 1982-08-12

Family

ID=11916516

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1644881A Pending JPS57130454A (en) 1981-02-06 1981-02-06 Chip carrier

Country Status (1)

Country Link
JP (1) JPS57130454A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63133554A (en) * 1986-11-25 1988-06-06 Nec Corp Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5389664A (en) * 1977-01-19 1978-08-07 Hitachi Ltd Package structure of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5389664A (en) * 1977-01-19 1978-08-07 Hitachi Ltd Package structure of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63133554A (en) * 1986-11-25 1988-06-06 Nec Corp Semiconductor device

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