JPS56158467A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS56158467A
JPS56158467A JP6431080A JP6431080A JPS56158467A JP S56158467 A JPS56158467 A JP S56158467A JP 6431080 A JP6431080 A JP 6431080A JP 6431080 A JP6431080 A JP 6431080A JP S56158467 A JPS56158467 A JP S56158467A
Authority
JP
Japan
Prior art keywords
contact region
elements
faced
generation
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6431080A
Other languages
Japanese (ja)
Other versions
JPS6239820B2 (en
Inventor
Natsuo Tsubouchi
Haruhiko Abe
Hiroji Harada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP6431080A priority Critical patent/JPS56158467A/en
Publication of JPS56158467A publication Critical patent/JPS56158467A/en
Publication of JPS6239820B2 publication Critical patent/JPS6239820B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To prevent the generation of a soft error caused by alpha rays by a method wherein the first element having a contact region inside a bonding pad and the second element having a contact region on the circumferential section are faced each other and their contact regions are connected and coupled. CONSTITUTION:A contact region 4 consisting of copper plating is provided on the inside of the bonding pad 2 on the first element 1. After a contact region 7 has been provided on the circumferential section of the second element 6, a connecting material 8 consisting of a solder ball is formed on the contact region 7. Then, the first and the second elements are faced each other, are arranged in such manner that the contact region 4 and the connecting material 8 are coincided, a heat treatment is performed and then a welding and a coupling works are performed. After the composite element has been fusion welded on a supporting base 5, the element is connected to a package using a wire 3. Through these procedures, the circuit on the elements can be shielded using the substrate sections of both elements and the generation of the soft error caused by the alpha rays of an MOS dynamic memory can be prevented.
JP6431080A 1980-05-12 1980-05-12 Semiconductor device Granted JPS56158467A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6431080A JPS56158467A (en) 1980-05-12 1980-05-12 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6431080A JPS56158467A (en) 1980-05-12 1980-05-12 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS56158467A true JPS56158467A (en) 1981-12-07
JPS6239820B2 JPS6239820B2 (en) 1987-08-25

Family

ID=13254530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6431080A Granted JPS56158467A (en) 1980-05-12 1980-05-12 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS56158467A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988864A (en) * 1982-11-12 1984-05-22 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US6208018B1 (en) 1997-05-29 2001-03-27 Micron Technology, Inc. Piggyback multiple dice assembly
US6682954B1 (en) 1996-05-29 2004-01-27 Micron Technology, Inc. Method for employing piggyback multiple die #3
US6900528B2 (en) 2001-06-21 2005-05-31 Micron Technology, Inc. Stacked mass storage flash memory package

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5339068A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Semiconductor device
JPS5365063A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device
JPS5552246A (en) * 1978-10-13 1980-04-16 Mitsubishi Electric Corp Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51102566A (en) * 1975-03-07 1976-09-10 Suwa Seikosha Kk Shusekikairo
JPS5339068A (en) * 1976-09-22 1978-04-10 Hitachi Ltd Semiconductor device
JPS5365063A (en) * 1976-11-22 1978-06-10 Nec Corp Semiconductor device
JPS5552246A (en) * 1978-10-13 1980-04-16 Mitsubishi Electric Corp Semiconductor device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5988864A (en) * 1982-11-12 1984-05-22 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US6682954B1 (en) 1996-05-29 2004-01-27 Micron Technology, Inc. Method for employing piggyback multiple die #3
US6208018B1 (en) 1997-05-29 2001-03-27 Micron Technology, Inc. Piggyback multiple dice assembly
US6900528B2 (en) 2001-06-21 2005-05-31 Micron Technology, Inc. Stacked mass storage flash memory package
US7262506B2 (en) 2001-06-21 2007-08-28 Micron Technology, Inc. Stacked mass storage flash memory package
US7375419B2 (en) 2001-06-21 2008-05-20 Micron Technology, Inc. Stacked mass storage flash memory package
US7704794B2 (en) 2001-06-21 2010-04-27 Micron Technology, Inc. Method of forming a semiconductor device
US7999378B2 (en) 2001-06-21 2011-08-16 Round Rock Research, Llc Semiconductor devices including semiconductor dice in laterally offset stacked arrangement
US7998792B2 (en) 2001-06-21 2011-08-16 Round Rock Research, Llc Semiconductor device assemblies, electronic devices including the same and assembly methods
US8049342B2 (en) 2001-06-21 2011-11-01 Round Rock Research, Llc Semiconductor device and method of fabrication thereof

Also Published As

Publication number Publication date
JPS6239820B2 (en) 1987-08-25

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