JPH05218228A - Substrate for electronic component mounting use - Google Patents

Substrate for electronic component mounting use

Info

Publication number
JPH05218228A
JPH05218228A JP5426992A JP5426992A JPH05218228A JP H05218228 A JPH05218228 A JP H05218228A JP 5426992 A JP5426992 A JP 5426992A JP 5426992 A JP5426992 A JP 5426992A JP H05218228 A JPH05218228 A JP H05218228A
Authority
JP
Japan
Prior art keywords
electronic component
component mounting
insulating base
base material
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5426992A
Other languages
Japanese (ja)
Inventor
Yoshitaka Ono
嘉隆 小野
Masahiro Ueda
昌宏 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP5426992A priority Critical patent/JPH05218228A/en
Publication of JPH05218228A publication Critical patent/JPH05218228A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/15165Monolayer substrate

Abstract

PURPOSE:To provide a substrate for electronic component mounting use, which is easy in processing, is simple in structure and a highly integrated packaging can be realized. CONSTITUTION:A substrate for electronic component mounting use has an insulating substrate 9 having an electronic component mounting part 95 on a surface 91, bonding pads 7 provided on the periphery of the mounting part 95 and external terminals 2 provided on a rear 99 of the substrate 9. Moreover, the substrate for electronic component mounting use has penetrated through holes 1 provided in outer edge parts 92 of the substrate 9, first wiring patterns 17 to connect the pads 7 with the holes 1 and second wiring patterns 12 to connect the holes 1 with the terminals 2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は,加工容易,構造簡単
で,高密度実装が可能な電子部品搭載用基板に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for mounting electronic parts, which is easy to process, has a simple structure, and enables high-density mounting.

【0002】[0002]

【従来技術】近年,電子部品の高密度集積化が進んでき
ている。それに伴い,電子部品からの電気信号を受信す
る電子部品搭載用基板の高密度実装化が要求されてい
る。その従来技術として,例えば,実開昭55−176
571に開示されたごとき電子部品搭載用基板がある。
2. Description of the Related Art In recent years, high-density integration of electronic parts has advanced. Along with this, there is a demand for high-density mounting of electronic component mounting boards that receive electrical signals from electronic components. As the prior art, for example, the actual exploitation 55-176
There is an electronic component mounting substrate as disclosed in 571.

【0003】上記電子部品搭載用基板は,図8〜10に
示すごとく,絶縁基材901,902,903からなる
基板本体と,絶縁基材901の表面91に設けられた電
子部品搭載用凹部95と,上記電子部品搭載用凹部95
の周囲に設けられたボンディングパッド7と,絶縁基材
903の裏面99に格子状に設けた多数の外部端子8
1,82,83とを有する。かかる構造の電子部品搭載
用基板は,リードレスチップキャリアとも称されてい
る。
As shown in FIGS. 8 to 10, the electronic component mounting substrate is a substrate body made of insulating base materials 901, 902 and 903, and an electronic component mounting recess 95 provided on a surface 91 of the insulating base material 901. And the electronic component mounting recess 95
And bonding pads 7 provided around the peripheral surface of the insulating base material 903 and a large number of external terminals 8 arranged in a grid pattern on the back surface 99 of the insulating base material 903.
1, 82, and 83. The electronic component mounting substrate having such a structure is also called a leadless chip carrier.

【0004】そして,図8,9に示すごとく,外部端子
81〜83の中,外部端子81は基板本体の最も外側に
位置し,外部端子82,83は電子部品搭載用凹部95
の下方にあり,外部端子82は外部端子81,83の間
に位置している。上記外部端子81は,絶縁基材901
〜903を貫通する1本のスルーホール51により,接
続回路57と接続されている。接続回路57はボンディ
ングパッド7に接続されている(図9)。かかる外部端
子82は,ブラインドバイアホール52,53,及びそ
の間に設けた内層回路6を介して,接続回路57と接続
されている。外部端子83は,ブラインドバイアホール
54,55,その間に設けた内層回路6を介して,接続
回路57と接続されている。
Then, as shown in FIGS. 8 and 9, among the external terminals 81 to 83, the external terminal 81 is located at the outermost side of the substrate body, and the external terminals 82 and 83 are recessed portions 95 for mounting electronic parts.
, And the external terminal 82 is located between the external terminals 81 and 83. The external terminal 81 is an insulating base material 901.
One through hole 51 penetrating through ˜903 connects to the connection circuit 57. The connection circuit 57 is connected to the bonding pad 7 (FIG. 9). The external terminal 82 is connected to the connection circuit 57 via the blind via holes 52, 53 and the inner layer circuit 6 provided therebetween. The external terminal 83 is connected to the connection circuit 57 via the blind via holes 54, 55 and the inner layer circuit 6 provided therebetween.

【0005】上記電子部品搭載用凹部95には,電子部
品4が搭載されている。該電子部品4とボンディングパ
ッド7とは,ボンデングワイヤー47により接続されて
いる。上記従来の電子部品搭載用基板は,外部端子81
〜83が,絶縁基材9の裏面99に格子状に多数設けら
れている。そのため,上記外部端子を,絶縁基材903
の裏面99全域に設けることができ,電子部品搭載用基
板の高密度実装化を図ることができる。
The electronic component 4 is mounted in the electronic component mounting recess 95. The electronic component 4 and the bonding pad 7 are connected by a bonding wire 47. The above-mentioned conventional electronic component mounting board has an external terminal 81.
On the back surface 99 of the insulating base material 9, a large number of elements are arranged in a grid pattern. Therefore, the external terminals are connected to the insulating base material 903.
Since it can be provided on the entire back surface 99, high density mounting of the electronic component mounting board can be achieved.

【0006】[0006]

【解決しようとする課題】しかしながら,上記ブライン
ドバイアホール52〜55,内層回路6による,接続回
路57と外部端子82,83との接続は,構造上複雑な
ものとなる。即ち,上記外部端子82,83は,電子部
品搭載用凹部95の下方に相当する位置(図10一点鎖
線枠内)に設けられている。そのため,電子部品搭載用
基板の内部,即ちブラインドバイアホール52〜55の
途中に内層回路6を設けなければならない。該内層回路
6を形成する場合には,まず絶縁基材902,903を
用いて,その各表面に内層回路6を形成しておく。次
に,上記各絶縁基材にブラインドバイアホール52〜5
5を設ける。その後,上記絶縁基材901〜903を積
層し,接着する。
However, the connection between the connection circuit 57 and the external terminals 82 and 83 by the blind via holes 52 to 55 and the inner layer circuit 6 is structurally complicated. That is, the external terminals 82 and 83 are provided at a position corresponding to the lower part of the electronic component mounting recess 95 (indicated by a chain line in FIG. 10). Therefore, the inner layer circuit 6 must be provided inside the electronic component mounting board, that is, in the middle of the blind via holes 52 to 55. When forming the inner layer circuit 6, first, the insulating base materials 902 and 903 are used to form the inner layer circuit 6 on each surface thereof. Next, the blind via holes 52 to 5 are formed on the insulating base materials.
5 is provided. Then, the insulating base materials 901 to 903 are laminated and adhered.

【0007】そのため,電子部品搭載用基板の製造工程
数が多く,手間と労力を必要とする。それ故,電子部品
搭載用基板がコスト高となる。また,電子部品搭載用基
板の実装状態が高密度になると,内層回路6の配線パタ
ーンの配置が複雑になる。また,配線パターンの設計自
由度が少なくなる。本発明は,かかる問題点に鑑み,加
工容易,構造簡単で,高密度実装が可能な電子部品搭載
用基板を提供しようとするものである。
Therefore, the number of manufacturing steps of the electronic component mounting board is large, and labor and labor are required. Therefore, the cost of the electronic component mounting board becomes high. Further, when the mounting state of the electronic component mounting board becomes high, the layout of the wiring pattern of the inner layer circuit 6 becomes complicated. In addition, the degree of freedom in designing the wiring pattern is reduced. In view of the above problems, the present invention aims to provide an electronic component mounting substrate that is easy to process, has a simple structure, and enables high-density mounting.

【0008】[0008]

【解決するための手段】本発明は,表面に電子部品搭載
部を有する絶縁基材と,上記電子部品搭載部の周囲に設
けたボンディングパッドと,絶縁基材の裏面に設けた外
部端子と,絶縁基材の外縁部に設けられた貫通スルーホ
ールと,上記ボンディングパッドと貫通スルーホールと
を接続する第1配線パターンと,上記貫通スルーホール
と上記外部端子とを接続する第2配線パターンとを有す
ることを特徴とする電子部品搭載用基板にある。
According to the present invention, an insulating base material having an electronic component mounting portion on its surface, bonding pads provided around the electronic component mounting portion, and external terminals provided on the back surface of the insulating base material are provided. A through wiring hole provided on the outer edge of the insulating base material; a first wiring pattern connecting the bonding pad and the through through hole; and a second wiring pattern connecting the through hole and the external terminal. The electronic component mounting board is characterized by having.

【0009】本発明において最も注目すべきことは,貫
通スルーホールを電子部品搭載部よりも離れた絶縁基材
の外縁部に集合させたこと,及びボンディングパッドと
貫通スルーホールとを接続する第1配線パターンと,貫
通スルーホールと外部端子とを接続する第2配線パター
ンとを設けたことである。
What is most noticeable in the present invention is that the through-holes are gathered at the outer edge portion of the insulating base material which is separated from the electronic component mounting portion, and the first connecting pad and the through-hole are connected. That is, the wiring pattern and the second wiring pattern for connecting the through hole and the external terminal are provided.

【0010】上記貫通スルーホールは,電子部品搭載用
基板の表面と裏面との間を貫通すると共に第1配線パタ
ーンと第2配線パターンとを電気的に導通させる導体で
ある。貫通スルーホールは,上記外縁部において,1列
に配列させてもよい。また,2列以上に配列させてもよ
い。貫通スルーホールは,電子部品搭載用基板の側面側
に設けられた,半円状外円スルーホールであってもよ
い。上記,絶縁基材の外縁部とは,電子部品搭載用基板
において,電子部品搭載部よりも離れた,絶縁基材の外
周部分近く又は外周をいう。
The through-holes are conductors that penetrate between the front surface and the back surface of the electronic component mounting board and electrically connect the first wiring pattern and the second wiring pattern. The through-holes may be arranged in a line at the outer edge. Further, they may be arranged in two or more columns. The through-holes may be semicircular outer circle through-holes provided on the side surface of the electronic component mounting board. The outer edge portion of the insulating base material means, in the electronic component mounting board, near or around the outer peripheral portion of the insulating base material, which is farther from the electronic component mounting portion.

【0011】上記外部端子は,電子部品搭載用基板の裏
面の全域の任意の位置に設ける。外部端子は,例えば格
子状,渦型状などに配置する。上記絶縁基材は1枚また
は2枚以上である。2枚以上の場合,絶縁基材の内部に
上記第1配線パターンを配置し,第1配線パターン,接
地回路,電源回路などを配線させることができる。
The external terminals are provided at arbitrary positions on the entire back surface of the electronic component mounting board. The external terminals are arranged, for example, in a lattice shape or a spiral shape. The insulating base material is one or more. In the case of two or more sheets, the above-mentioned first wiring pattern can be arranged inside the insulating base material and the first wiring pattern, the ground circuit, the power supply circuit, etc. can be wired.

【0012】また,絶縁基材の材料は,ガラスエポキシ
樹脂,ガラストリアジン樹脂,ガラスポリイミド樹脂等
の合成樹脂基板を用いる。ボンディングパッド及び外部
端子の表面には,Ni/Auメッキ被膜が施されている
ことが好ましい。また,貫通スルーホールの径は0.4
mm以下が好ましい。これにより,絶縁基材の外縁部に
貫通スルーホールを多数設けることができ,高密度実装
が可能となる。また,電子部品搭載部は,ザグリ加工等
により凹状を成しておくことが好ましい。絶縁基材の表
面及び裏面には,ボンディングパッド,外部端子及び貫
通スルーホールを除いてソルダーレジストを被覆するこ
とが好ましい。
As the material of the insulating base material, a synthetic resin substrate made of glass epoxy resin, glass triazine resin, glass polyimide resin or the like is used. The surfaces of the bonding pad and the external terminal are preferably coated with Ni / Au plating. The diameter of the through hole is 0.4.
mm or less is preferable. As a result, a large number of through-holes can be provided on the outer edge of the insulating base material, which enables high-density mounting. Further, it is preferable that the electronic component mounting portion is formed in a concave shape by counterboring or the like. It is preferable that the front surface and the back surface of the insulating base material are coated with a solder resist except for the bonding pad, the external terminal and the through-hole.

【0013】[0013]

【作用及び効果】本発明の電子部品搭載用基板において
は,絶縁基材の外縁部に貫通スルーホールを設け,ボン
ディングパッドと外部端子との間を,第1配線パターン
と貫通スルーホールと第2配線パターンとにより接続し
ている。そのため,上記電子部品搭載用基板の表面と裏
面との配線パターンの接続は,絶縁基材に直線状に穿設
した貫通スルーホールにより行えば良く,従来のごとく
形成困難なブラインドバイアホールを設ける必要がな
い。
In the electronic component mounting board of the present invention, the through hole is provided at the outer edge of the insulating base material, and the first wiring pattern, the through hole, and the second through hole are provided between the bonding pad and the external terminal. It is connected with the wiring pattern. Therefore, the wiring patterns on the front surface and the back surface of the electronic component mounting board may be connected by through-holes linearly formed in the insulating base material, and blind via holes, which are difficult to form as in the past, need to be provided. There is no.

【0014】また,そのため,電子部品搭載用基板の実
装状態を高密度にする場合でも,配線パターンの構造が
簡単である。それ故,電子部品搭載用基板の加工が容易
である。また,貫通スルーホールは,絶縁基材の外縁部
にある。そのため,外部端子は,電子部品搭載用基板の
裏面のほぼ全域において,任意の位置に設けることがで
きる。そのため,高密度実装に多数必要な外部端子の設
計に大きな自由度がある。従って,本発明によれば,加
工容易,構造簡単で,高密度実装が可能な電子部品搭載
用基板を提供することができる。
Therefore, the structure of the wiring pattern is simple even when the mounting state of the electronic component mounting board is made high. Therefore, it is easy to process the electronic component mounting board. Further, the through-holes are located at the outer edge of the insulating base material. Therefore, the external terminals can be provided at arbitrary positions on almost the entire back surface of the electronic component mounting board. Therefore, there is a great deal of freedom in designing the external terminals that are required for high-density mounting. Therefore, according to the present invention, it is possible to provide an electronic component mounting substrate which is easy to process and has a simple structure and which enables high-density mounting.

【0015】[0015]

【実施例】【Example】

実施例1 本発明の実施例にかかる電子部品搭載用基板(リードレ
スチップキャリア)につき,図1ないし図3を用いて説
明する。本例の電子部品搭載用基板は,図1に示すごと
く,表面91に電子部品搭載部95を有する絶縁基材9
と,電子部品搭載部95の周囲に設けたボンディングパ
ッド7と,絶縁基材9の裏面99に設けた外部端子2と
を有する。また,,絶縁基材9の外縁部92に穿設され
た円形状の貫通スルーホール1と,ボンディングパッド
7と貫通スルーホール1とを接続する第1配線パターン
17と,貫通スルーホール1と外部端子2とを接続する
第2配線パターン12とを有する。
Example 1 An electronic component mounting substrate (leadless chip carrier) according to an example of the present invention will be described with reference to FIGS. As shown in FIG. 1, the electronic component mounting board of the present example has an insulating substrate 9 having an electronic component mounting portion 95 on a surface 91.
And the bonding pad 7 provided around the electronic component mounting portion 95 and the external terminal 2 provided on the back surface 99 of the insulating base material 9. In addition, the circular through-hole 1 formed in the outer edge portion 92 of the insulating base material 9, the first wiring pattern 17 connecting the bonding pad 7 and the through-through hole 1, the through-hole 1 and the outside It has the 2nd wiring pattern 12 which connects with the terminal 2.

【0016】上記電子部品搭載部95は,凹状形をして
いる。その壁面は,銅メッキ951で被覆されている。
上記ボンディングパッド7は,図2に示すごとく,電子
部品搭載部95の周囲に,1列に等間隔に配列されてい
る。上記外部端子2は,図3に示すごとく,絶縁基材9
の裏面99に格子状に配列されている。貫通スルーホー
ル1は,外部端子2よりも外側において絶縁基材9の外
周端近くに,1列に等間隔に配列されている。
The electronic component mounting portion 95 has a concave shape. The wall surface is covered with copper plating 951.
As shown in FIG. 2, the bonding pads 7 are arranged in one row at equal intervals around the electronic component mounting portion 95. The external terminal 2 has an insulating base material 9 as shown in FIG.
Are arranged in a lattice pattern on the back surface 99 of the. The through-holes 1 are arranged outside the external terminal 2 near the outer peripheral edge of the insulating base material 9 in one row at equal intervals.

【0017】本例の電子部品搭載用基板においては,絶
縁基材9の外縁部92に貫通スルーホール1を設けてい
る。貫通スルーホール1は,絶縁基材9の表面91にお
いては,第1配線パターン17を介してボンディングパ
ッド7と接続されている。一方,絶縁基材9の裏面99
においては,第2配線パターン12を介して外部端子2
と接続されている。その他は,従来例と同様である。
In the electronic component mounting board of this example, the through-hole 1 is provided in the outer edge portion 92 of the insulating base material 9. The through-hole 1 is connected to the bonding pad 7 via the first wiring pattern 17 on the surface 91 of the insulating base material 9. On the other hand, the back surface 99 of the insulating base material 9
In the external terminal 2 via the second wiring pattern 12.
Connected with. Others are the same as the conventional example.

【0018】本例の電子部品搭載用基板においては,絶
縁基材9の外縁部92に貫通スルーホール1を設け,ボ
ンディングパッド7と外部端子2との間を,第1配線パ
ターン17と貫通スルーホール1と第2配線パターン1
2とにより接続されている。そのため,上記電子部品搭
載用基板の表面91と裏面99との配線パターンの接続
は,絶縁基材9に直線状に穿設した貫通スルーホール1
により行えば良く,従来のごとく形成困難なブラインド
バイアホールを設ける必要がない。
In the electronic component mounting substrate of this example, the through-hole 1 is provided in the outer edge portion 92 of the insulating base material 9, and the first wiring pattern 17 and the through-hole are provided between the bonding pad 7 and the external terminal 2. Hole 1 and second wiring pattern 1
It is connected by 2 and. Therefore, the connection of the wiring pattern between the front surface 91 and the back surface 99 of the electronic component mounting substrate is performed by penetrating the through-hole 1 formed in the insulating base material 9 in a straight line.
It is not necessary to provide a blind via hole which is difficult to form as in the conventional case.

【0019】そのため,電子部品搭載用基板の実装状態
を高密度にする場合でも,配線パターンの構造が簡単で
ある。即ち,第1配線パターン17と第2配線パターン
12との接続には,貫通スルーホール1を設けるのみで
良い。従って,電子部品搭載用基板の加工が容易であ
る。手間がかからない。また,貫通スルーホール1は,
電子部品搭載用基板において電子部品搭載部95の外縁
部92にある。外部端子2は,絶縁基材9の裏面99の
全域の任意の位置に設けてある。そのため,貫通スルー
ホール1及び外部端子2の設計に大きな自由度がある。
Therefore, even when the mounting state of the electronic component mounting board is set to a high density, the structure of the wiring pattern is simple. That is, it is only necessary to provide the through-hole 1 for connecting the first wiring pattern 17 and the second wiring pattern 12. Therefore, the processing of the electronic component mounting substrate is easy. It does not take time and effort. In addition, the through hole 1
It is on the outer edge portion 92 of the electronic component mounting portion 95 in the electronic component mounting substrate. The external terminal 2 is provided at an arbitrary position on the entire back surface 99 of the insulating base material 9. Therefore, there is great freedom in designing the through-hole 1 and the external terminal 2.

【0020】実施例2 本例の電子部品搭載用基板においては,図4に示すごと
く,貫通スルーホール10を,2並列に互い違いに配列
されている。この貫通スルーホール10は,絶縁基材9
の裏面99において外部端子2と接続している。外部端
子2は,絶縁基材9の裏面99の全域に配列されてい
る。一方,絶縁基材9の表面においては第1配線パター
ンによりボンディングパッドと接続されている。その他
は実施例1と同様である。本例においても,実施例1と
同様の効果を得ることができる。
Embodiment 2 In the electronic component mounting board of this embodiment, as shown in FIG. 4, the through through holes 10 are arranged in parallel in two rows. The through-hole 10 is an insulating base material 9.
Is connected to the external terminal 2 on the back surface 99 of the. The external terminals 2 are arranged all over the back surface 99 of the insulating base material 9. On the other hand, the surface of the insulating base material 9 is connected to the bonding pad by the first wiring pattern. Others are the same as in the first embodiment. Also in this example, the same effect as that of the first embodiment can be obtained.

【0021】実施例3 本例の電子部品搭載用基板においては,図5に示すごと
く,実施例1において,絶縁基材9の外周端にも半円状
の貫通スルーホール11を設けている。貫通スルーホー
ル11は,絶縁基材9の裏面99においては第2配線パ
ターン120により外部端子2と,絶縁基材9の表面に
おいては第1配線パターンによりボンディングパッドと
接続されている。
Example 3 In the electronic component mounting substrate of this example, as shown in FIG. 5, a semicircular through-hole 11 is also provided at the outer peripheral edge of the insulating base material 9 in Example 1. The through-holes 11 are connected to the external terminals 2 on the back surface 99 of the insulating base material 9 by the second wiring pattern 120 and to the bonding pads on the front surface of the insulating base material 9 by the first wiring pattern.

【0022】また,上記外周端よりも内側においては,
実施例1と同様の貫通スルーホール1が設けられ,第2
配線パターン12により,外部端子2と接続されてい
る。その他は実施例1と同様である。本例においては,
絶縁基材9の外周端にも貫通スルーホールを設けている
ので,より高密度に外部端子を設けることができる。本
例においても,実施例1と同様の効果を得ることができ
る。
Further, inside the outer peripheral edge,
A through through hole 1 similar to that of the first embodiment is provided, and
The wiring pattern 12 is connected to the external terminal 2. Others are the same as in the first embodiment. In this example,
Since the through-holes are also provided at the outer peripheral edge of the insulating base material 9, the external terminals can be provided at a higher density. Also in this example, the same effect as that of the first embodiment can be obtained.

【0023】実施例4 本例の電子部品搭載用基板においては,図6に示すごと
く,絶縁基材910,911,912を積層したもの
で,電子部品搭載用基板の内部に,接地回路31と電源
回路32とを設けている。上記接地回路31は,電子部
品搭載部95の銅メッキ951と貫通スルーホール10
1の銅メッキとを接続している。
Example 4 In the electronic component mounting board of this example, as shown in FIG. 6, insulating base materials 910, 911 and 912 are laminated, and a grounding circuit 31 and a ground circuit 31 are provided inside the electronic component mounting board. The power supply circuit 32 is provided. The ground circuit 31 includes the copper plating 951 of the electronic component mounting portion 95 and the through-holes 10.
1 and copper plating are connected.

【0024】上記電源回路32は,貫通スルーホール1
02と接続されている。該貫通スルーホール102は第
1配線パターン17を介して電源用のボンディングパッ
ド7と接続している。その他は,実施例1と同様であ
る。本例においても,実施例1と同様の効果を得ること
ができる。
The power supply circuit 32 has a through-hole 1
02 is connected. The through-hole 102 is connected to the power supply bonding pad 7 via the first wiring pattern 17. Others are the same as in the first embodiment. Also in this example, the same effect as that of the first embodiment can be obtained.

【0025】実施例5 本例の電子部品搭載用基板は,図7に示すごとく,絶縁
基材913,914を積層したもので,電子部品搭載用
基板の内部にも第1配線パターン170を設けている。
即ち,上記電子部品搭載用基板は,表面91に電子部品
搭載部95を設けた下側の絶縁基材914と,上記電子
部品搭載部95の開口部よりも更に大きい開口部955
を設けた上側の絶縁基材913とを有する。
Example 5 The electronic component mounting substrate of this example is a laminate of insulating base materials 913 and 914 as shown in FIG. 7, and the first wiring pattern 170 is provided inside the electronic component mounting substrate. ing.
That is, the electronic component mounting substrate has a lower insulating base material 914 provided with the electronic component mounting portion 95 on the surface 91, and an opening 955 larger than the opening of the electronic component mounting portion 95.
And the insulating base material 913 on the upper side.

【0026】上記電子部品搭載部95及び開口部955
の周囲には,ボンディングパッド70,71を設けてい
る。絶縁基材913,914の外縁部92には,円形状
の貫通スルーホール1を穿設している。ボンディングパ
ッド70,71と貫通スルーホール1とは,第1配線パ
ターン170,171を介してそれぞれ接続されてい
る。その他は実施例1と同様である。
The electronic component mounting portion 95 and the opening 955 are provided.
Bonding pads 70 and 71 are provided on the periphery of the. A circular through hole 1 is formed in the outer edge portion 92 of the insulating base materials 913 and 914. The bonding pads 70 and 71 and the through-hole 1 are connected via the first wiring patterns 170 and 171 respectively. Others are the same as in the first embodiment.

【0027】本例の電子部品搭載用基板は,第1配線パ
ターン170,171を2層の絶縁基材913,914
の間に配置されている。そのため,上記第1配線パター
ンをより高密度に配置することができる。本例において
も,実施例1と同様の効果を得ることができる。
In the electronic component mounting substrate of this example, the first wiring patterns 170 and 171 are formed into two layers of insulating base materials 913 and 914.
It is located between. Therefore, the first wiring patterns can be arranged with higher density. Also in this example, the same effect as that of the first embodiment can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例1の電子部品搭載用基板の断面図。FIG. 1 is a sectional view of an electronic component mounting board according to a first embodiment.

【図2】実施例1の電子部品搭載用基板の一部平面図。FIG. 2 is a partial plan view of the electronic component mounting board according to the first embodiment.

【図3】実施例1の電子部品搭載用基板の一部裏面図。FIG. 3 is a partial rear view of the electronic component mounting board according to the first embodiment.

【図4】実施例2の電子部品搭載用基板の一部裏面図。FIG. 4 is a partial rear view of the electronic component mounting board according to the second embodiment.

【図5】実施例3の電子部品搭載用基板の一部裏面図。FIG. 5 is a partial rear view of the electronic component mounting board according to the third embodiment.

【図6】実施例4の電子部品搭載用基板の断面図。FIG. 6 is a cross-sectional view of an electronic component mounting board according to a fourth embodiment.

【図7】実施例5の電子部品搭載用基板の断面図。FIG. 7 is a cross-sectional view of an electronic component mounting board according to a fifth embodiment.

【図8】従来例の電子部品搭載用基板の一部断面図。FIG. 8 is a partial cross-sectional view of a conventional electronic component mounting substrate.

【図9】従来例の電子部品搭載用基板の一部平面図。FIG. 9 is a partial plan view of a conventional electronic component mounting board.

【図10】従来例の電子部品搭載用基板の裏面図。FIG. 10 is a rear view of a conventional electronic component mounting substrate.

【符号の説明】[Explanation of symbols]

1,10,11,101,102...貫通スルーホー
ル, 12,120...第2配線パターン, 17,170,171...第1配線パターン, 2...外部端子, 7...ボンディングパッド, 9,910,911,912,913,914...絶
縁基材,
1, 10, 11, 101, 102. . . Through through hole, 12, 120. . . Second wiring pattern, 17, 170, 171. . . First wiring pattern, 2. . . External terminal, 7. . . Bonding pad, 9, 910, 911, 912, 913, 914. . . Insulating base material,

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 表面に電子部品搭載部を有する絶縁基材
と,上記電子部品搭載部の周囲に設けたボンディングパ
ッドと,絶縁基材の裏面に設けた外部端子と,絶縁基材
の外縁部に設けられた貫通スルーホールと,上記ボンデ
ィングパッドと貫通スルーホールとを接続する第1配線
パターンと,上記貫通スルーホールと上記外部端子とを
接続する第2配線パターンとを有することを特徴とする
電子部品搭載用基板。
1. An insulating base material having an electronic component mounting portion on its surface, bonding pads provided around the electronic component mounting portion, external terminals provided on the back surface of the insulating base material, and an outer edge portion of the insulating base material. And a first wiring pattern for connecting the bonding pad and the through through hole, and a second wiring pattern for connecting the through through hole and the external terminal. Substrate for mounting electronic components.
JP5426992A 1992-02-04 1992-02-04 Substrate for electronic component mounting use Pending JPH05218228A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5426992A JPH05218228A (en) 1992-02-04 1992-02-04 Substrate for electronic component mounting use

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5426992A JPH05218228A (en) 1992-02-04 1992-02-04 Substrate for electronic component mounting use

Publications (1)

Publication Number Publication Date
JPH05218228A true JPH05218228A (en) 1993-08-27

Family

ID=12965860

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5426992A Pending JPH05218228A (en) 1992-02-04 1992-02-04 Substrate for electronic component mounting use

Country Status (1)

Country Link
JP (1) JPH05218228A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07283336A (en) * 1994-04-05 1995-10-27 Toppan Printing Co Ltd Chip carrier
JP2002334948A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Semiconductor package, substrate for semiconductor element mounting and method of manufacturing them
JP2002334949A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Semiconductor package and method of manufacturing substrate for semiconductor element mounting
JP2002334951A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Substrate for semiconductor element mounting and semiconductor package

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002334948A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Semiconductor package, substrate for semiconductor element mounting and method of manufacturing them
JP2002334949A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Semiconductor package and method of manufacturing substrate for semiconductor element mounting
JP2002334951A (en) * 1994-03-18 2002-11-22 Hitachi Chem Co Ltd Substrate for semiconductor element mounting and semiconductor package
JPH07283336A (en) * 1994-04-05 1995-10-27 Toppan Printing Co Ltd Chip carrier

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