JPS6057999A - Multilayer circuit board - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multilayer wiring board, and particularly to a printed wiring board on which a multi-terminal electronic component (hereinafter referred to as a component) having a large number of closely spaced connection pins such as a flat package or a pin grid IC is mounted. Regarding conductive pads.

Conventionally, conductive pads provided on multilayer wiring boards are provided on the outer layer of the multilayer wiring board, so when mounting components with three or more rows of connecting pins, the circuit is placed on the outermost layer. The pattern is concentrated. Therefore, even if some of the circuit patterns are passed through the inner layer to avoid concentration, countermeasures such as providing a layer having conductive pads only as lands on the outermost layer are required.

Additionally, at the same time, through-hole plating was required to connect the internal circuit pattern to the external conductive pad.

An object of the present invention is to provide a multilayer wiring board having conductive pads that eliminates the need for connection between such internal circuit patterns and external conductive pads.

According to the present invention, a conductive pattern is provided on an insulating plate so that a part of each side of the laminated wiring board is exposed in a step-like pattern KJ', and a conductive pad is provided on the exposed part to connect a conductive batten. A multilayer wiring board is obtained, which is characterized by the following.

Embodiments of the present invention will be described below with reference to FIGS. 1(a) and 2(a) and FIGS. 2(a) and (b).

[Example 1] FIG. 1(a), Φ) shows an example of the present invention.
In particular, it is a multilayer wiring board having conductive pads on its surface suitable for mounting terminals of flat packages, chip carriers, etc. by pressure bonding, welding, soldering, etc.

The second insulating layer 3 is arranged so that Mi is extracted from the rectangular cutout. Therefore, the third part is designed to be able to connect with a part of the bin of components such as flat packages and chip carriers.
The circuit pattern 2 in which the conductive pads 4 of the layers are connected to the conductive pads 4 on the third insulating layer 1 has a horizontal structure that is not exposed to the outside due to the second insulating layer 3. Similarly, the conductive pads 4 of the second layer are arranged in the same position so as to be exposed from the cutout portion provided in the first insulating layer 5 to be larger than the third insulating layer so that they can be connected to some of the remaining terminals of the component. Set up

Therefore, the circuit pattern 2 on the second insulating layer 3 also has a structure that is hidden by the first insulating layer 5 on the surface, and therefore the four-electrode pads on each of the first to third insulating layers are exposed in a stepped manner. provided.

Furthermore, even if the number of layers is increased, this and l? It can be provided in a stepwise manner like r1.

[Example 2] Similarly, Fig. 2 (a), crest) shows a case where component terminals are mounted and a through mounting hole is provided in the conductive pad to enable mounting of plug-in type components such as a bin grid array. number 1
- This shows an example of a wiring board.

The part of the conductive pad 4 in the actual JAi example shown in FIG. , -8 Gion pad 4 with component mounting hole 6 that does not penetrate on the back side 1, and JX
This is because a component mounting hole 6 is provided that penetrates up to the point. The component mounting hole 6 which does not pass through to the back surface can be easily obtained by making a mounting hole in advance at the center of the pad of the required layer before stacking each layer It1. Similarly, it is also possible to use a blind through hole for τN et al.

As described above, the present invention has the following effects.

(1) Since the conductive pads formed by connecting to the internal conductive single-layer pattern are directly exposed to the outside, there is no need to provide a connecting part to the conductive pads on the outside by through-hole plating, etc.

(11) Since depressions are formed on the surface of the multilayer wiring board, there are many advantages in that the protrusion of one mounted component can be reduced and the mounting can be firmly performed.

It should be noted that any of the embodiments can be used not only for mounting ICs but also for connecting and mounting electronic components having similar connection bin shapes.

Moreover, it is of course possible to mount not only a single component but also several components at the same time.

[Brief explanation of drawings]

FIG. 1(a), (+)) shows the 10th layer of the multilayer wiring board of the present invention.
A plan view and a sectional view showing enlarged main parts of the example. Figure 2 (a) and (b) show the actual h of fA2 of the present invention.
A plan view and a sectional view of the main parts of Example 01, respectively. DESCRIPTION OF SYMBOLS 1...Third insulating layer, 2...Circuit pattern, 3...Second insulating layer, 4...Conductor pad, 5... ...First insulation l@, 6...
Component mounting hole (hole). 5- 1st Tower 2nd Entrance

Claims (1)

[Claims] A multilayer wiring characterized in that a conductive pattern is provided on an insulating plate and laminated, a part of each side of the wiring board is exposed in a stepwise manner, and a conductive bat is provided in the exposed part to connect to the conductive pattern. Board.