JPS5546572A - Tape carrier for mounting integrated circuit chips - Google Patents

Tape carrier for mounting integrated circuit chips

Info

Publication number
JPS5546572A
JPS5546572A JP12073478A JP12073478A JPS5546572A JP S5546572 A JPS5546572 A JP S5546572A JP 12073478 A JP12073478 A JP 12073478A JP 12073478 A JP12073478 A JP 12073478A JP S5546572 A JPS5546572 A JP S5546572A
Authority
JP
Japan
Prior art keywords
foil
tape carrier
chips
chip
adhered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12073478A
Other languages
Japanese (ja)
Inventor
Tamio Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP12073478A priority Critical patent/JPS5546572A/en
Publication of JPS5546572A publication Critical patent/JPS5546572A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To provide a tape carrier having no bump IC chips for mounting IC chips having good thermal conductivity.
CONSTITUTION: A polyimide film 11 is perforated at the center 12, adhered with a copper foil 13 to close the opening 12 on the back surface, and adhered with copper foil strips 14 on the periphery of the front surface. The strips 14 are connected to copper foil pieces 16 on the back via holes 15 perforated at the periphery of the film 11. IC chips 17 are placed on the foil 13, and adhered thereto. The connecting pad 18 of the chip is connected via gold wires to the strips 14. After an electric inspection, the board of the chip 17 is connected through the foil 13 and solder 21 to wiring electrode 20 of a circuit board 19 to allow the foil 16 connected to the foil 14 to be connected to the pattern 23 of the substrate 19 with solder 22. Eliminated parts are molten with solders 21, 22, and replaced with new IC chip carrying tape carrier. Thus, the chip carrying tape carrier can be obtained in high yield at the step of mounting them on the board with preferable thermal conductivity.
COPYRIGHT: (C)1980,JPO&Japio
JP12073478A 1978-09-30 1978-09-30 Tape carrier for mounting integrated circuit chips Pending JPS5546572A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12073478A JPS5546572A (en) 1978-09-30 1978-09-30 Tape carrier for mounting integrated circuit chips

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12073478A JPS5546572A (en) 1978-09-30 1978-09-30 Tape carrier for mounting integrated circuit chips

Publications (1)

Publication Number Publication Date
JPS5546572A true JPS5546572A (en) 1980-04-01

Family

ID=14793657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12073478A Pending JPS5546572A (en) 1978-09-30 1978-09-30 Tape carrier for mounting integrated circuit chips

Country Status (1)

Country Link
JP (1) JPS5546572A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459607A (en) * 1981-06-18 1984-07-10 Burroughs Corporation Tape automated wire bonded integrated circuit chip assembly
US4903113A (en) * 1988-01-15 1990-02-20 International Business Machines Corporation Enhanced tab package
US4970579A (en) * 1988-09-21 1990-11-13 International Business Machines Corp. Integrated circuit package with improved cooling means
US5036380A (en) * 1988-03-28 1991-07-30 Digital Equipment Corp. Burn-in pads for tab interconnects
US5848466A (en) * 1996-11-19 1998-12-15 Motorola, Inc. Method for forming a microelectronic assembly

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4459607A (en) * 1981-06-18 1984-07-10 Burroughs Corporation Tape automated wire bonded integrated circuit chip assembly
US4903113A (en) * 1988-01-15 1990-02-20 International Business Machines Corporation Enhanced tab package
US5036380A (en) * 1988-03-28 1991-07-30 Digital Equipment Corp. Burn-in pads for tab interconnects
US4970579A (en) * 1988-09-21 1990-11-13 International Business Machines Corp. Integrated circuit package with improved cooling means
US5848466A (en) * 1996-11-19 1998-12-15 Motorola, Inc. Method for forming a microelectronic assembly

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