JPS57117265A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57117265A
JPS57117265A JP56003379A JP337981A JPS57117265A JP S57117265 A JPS57117265 A JP S57117265A JP 56003379 A JP56003379 A JP 56003379A JP 337981 A JP337981 A JP 337981A JP S57117265 A JPS57117265 A JP S57117265A
Authority
JP
Japan
Prior art keywords
lead wires
breadth
voltage drop
semiconductor device
lead
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56003379A
Other languages
English (en)
Japanese (ja)
Other versions
JPH04387B2 (enrdf_load_stackoverflow
Inventor
Takashi Miyamoto
Kazufumi Terachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56003379A priority Critical patent/JPS57117265A/ja
Publication of JPS57117265A publication Critical patent/JPS57117265A/ja
Publication of JPH04387B2 publication Critical patent/JPH04387B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP56003379A 1981-01-13 1981-01-13 Semiconductor device Granted JPS57117265A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56003379A JPS57117265A (en) 1981-01-13 1981-01-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56003379A JPS57117265A (en) 1981-01-13 1981-01-13 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57117265A true JPS57117265A (en) 1982-07-21
JPH04387B2 JPH04387B2 (enrdf_load_stackoverflow) 1992-01-07

Family

ID=11555715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56003379A Granted JPS57117265A (en) 1981-01-13 1981-01-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57117265A (enrdf_load_stackoverflow)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986005322A1 (en) * 1985-02-28 1986-09-12 Sony Corporation Semiconducteur circuit device
JPS6359593A (ja) * 1986-08-30 1988-03-15 株式会社東芝 携帯可能媒体における実装方法
JPH02213148A (ja) * 1989-02-14 1990-08-24 Seiko Epson Corp テープキャリア
JPH02295143A (ja) * 1989-05-09 1990-12-06 Nec Corp 集積回路
EP1548826A1 (en) 2003-12-22 2005-06-29 Brother Kogyo Kabushiki Kaisha Chip pad layout
JP2012152984A (ja) * 2011-01-25 2012-08-16 Canon Inc 液体吐出ヘッドおよび液体吐出ヘッドの製造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49133558U (enrdf_load_stackoverflow) * 1973-03-20 1974-11-16
JPS523384A (en) * 1975-06-24 1977-01-11 Siemens Ag Comb teeth shaped conductor for semiconductor elements or integrated circuits

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49133558U (enrdf_load_stackoverflow) * 1973-03-20 1974-11-16
JPS523384A (en) * 1975-06-24 1977-01-11 Siemens Ag Comb teeth shaped conductor for semiconductor elements or integrated circuits

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986005322A1 (en) * 1985-02-28 1986-09-12 Sony Corporation Semiconducteur circuit device
JPS6359593A (ja) * 1986-08-30 1988-03-15 株式会社東芝 携帯可能媒体における実装方法
JPH02213148A (ja) * 1989-02-14 1990-08-24 Seiko Epson Corp テープキャリア
JPH02295143A (ja) * 1989-05-09 1990-12-06 Nec Corp 集積回路
EP1548826A1 (en) 2003-12-22 2005-06-29 Brother Kogyo Kabushiki Kaisha Chip pad layout
US7271478B2 (en) 2003-12-22 2007-09-18 Brother Kogyo Kabushiki Kaisha Printed circuit board and inkjet head
JP2012152984A (ja) * 2011-01-25 2012-08-16 Canon Inc 液体吐出ヘッドおよび液体吐出ヘッドの製造方法

Also Published As

Publication number Publication date
JPH04387B2 (enrdf_load_stackoverflow) 1992-01-07

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