JPS57114282A - Non-volatile semiconductor memory - Google Patents
Non-volatile semiconductor memoryInfo
- Publication number
- JPS57114282A JPS57114282A JP58881A JP58881A JPS57114282A JP S57114282 A JPS57114282 A JP S57114282A JP 58881 A JP58881 A JP 58881A JP 58881 A JP58881 A JP 58881A JP S57114282 A JPS57114282 A JP S57114282A
- Authority
- JP
- Japan
- Prior art keywords
- region
- drain
- source
- phosphorus
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title abstract 2
- 229910052698 phosphorus Inorganic materials 0.000 abstract 3
- 239000011574 phosphorus Substances 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052785 arsenic Inorganic materials 0.000 abstract 2
- -1 phosphorus ions Chemical class 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910052710 silicon Inorganic materials 0.000 abstract 2
- 239000010703 silicon Substances 0.000 abstract 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 abstract 1
- 239000012535 impurity Substances 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
- H01L29/7881—Programmable transistors with only two possible levels of programmation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Non-Volatile Memory (AREA)
Abstract
PURPOSE:To enhance the integration of a non-volatile semiconductor memory by providing a region having the same conductive type as source and drain regions and an impurity density lower than the regions to be contacted with the entire outer periphery under the floating gate of one or both of the source and drain. CONSTITUTION:A gate silicon oxidized film 2 and a polycrystalline silicon film 3 are fomred on a silicon substrate 1, and an oxidized film 4 and the second polycrystalline silicon film 5 are then grown. Subsequently, a desired phootoresist pattern is formed, and the shape of a control gate electrode 5 is determined. Thereafter, the unnecessaty parts of the films 4 and 3 are removed to determine the shape of a floating gate electrode 3. Then, phosphorus ions are implanted to the substrate of the part to become a drain region in future, and arsenic ions are implanted to the substrate of the part to become source and drain region in future. The phosphorus and arsenic are then activated and pressed to form a source 6, a drain 7 of N<+> type diffused region and an N<-> region 8 of phosphorus and to form a superposed region 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58881A JPS57114282A (en) | 1981-01-06 | 1981-01-06 | Non-volatile semiconductor memory |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58881A JPS57114282A (en) | 1981-01-06 | 1981-01-06 | Non-volatile semiconductor memory |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57114282A true JPS57114282A (en) | 1982-07-16 |
| JPH0132673B2 JPH0132673B2 (en) | 1989-07-10 |
Family
ID=11477879
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58881A Granted JPS57114282A (en) | 1981-01-06 | 1981-01-06 | Non-volatile semiconductor memory |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57114282A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0182198A2 (en) * | 1984-11-21 | 1986-05-28 | Rohm Corporation | Single transistor electrically programmable device and method |
| JPS622570A (en) * | 1985-04-30 | 1987-01-08 | テキサス インスツルメンツ インコ−ポレイテツド | Floating gate fet |
| JPS62118581A (en) * | 1985-09-27 | 1987-05-29 | テキサス インスツルメンツ インコ−ポレイテツド | Ep-rom memory cell and manufacture of the same |
| JPS62276878A (en) * | 1986-05-26 | 1987-12-01 | Hitachi Ltd | Semiconductor memory |
| JPS6481272A (en) * | 1987-09-24 | 1989-03-27 | Hitachi Ltd | Semiconductor memory device |
| US5587947A (en) * | 1994-03-03 | 1996-12-24 | Rohm Corporation | Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5178991A (en) * | 1974-12-30 | 1976-07-09 | Intel Corp |
-
1981
- 1981-01-06 JP JP58881A patent/JPS57114282A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5178991A (en) * | 1974-12-30 | 1976-07-09 | Intel Corp |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0182198A2 (en) * | 1984-11-21 | 1986-05-28 | Rohm Corporation | Single transistor electrically programmable device and method |
| JPS61127179A (en) * | 1984-11-21 | 1986-06-14 | ローム・コーポレーション | Electric program type memory for single transistor and method for maunfacturing and using the same |
| JPS622570A (en) * | 1985-04-30 | 1987-01-08 | テキサス インスツルメンツ インコ−ポレイテツド | Floating gate fet |
| JPS62118581A (en) * | 1985-09-27 | 1987-05-29 | テキサス インスツルメンツ インコ−ポレイテツド | Ep-rom memory cell and manufacture of the same |
| JPS62276878A (en) * | 1986-05-26 | 1987-12-01 | Hitachi Ltd | Semiconductor memory |
| JPS6481272A (en) * | 1987-09-24 | 1989-03-27 | Hitachi Ltd | Semiconductor memory device |
| US5587947A (en) * | 1994-03-03 | 1996-12-24 | Rohm Corporation | Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase |
| US5687120A (en) * | 1994-03-03 | 1997-11-11 | Rohn Corporation | Low voltage one transistor flash eeprom cell using fowler-nordheim programming and erase |
| US5689459A (en) * | 1994-03-03 | 1997-11-18 | Rohm Corporation | Low voltage one transistor flash EEPROM cell using Fowler-Nordheim programming and erase |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0132673B2 (en) | 1989-07-10 |
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