JPS57104259A - Metal oxide semiconductor device - Google Patents

Metal oxide semiconductor device

Info

Publication number
JPS57104259A
JPS57104259A JP55180385A JP18038580A JPS57104259A JP S57104259 A JPS57104259 A JP S57104259A JP 55180385 A JP55180385 A JP 55180385A JP 18038580 A JP18038580 A JP 18038580A JP S57104259 A JPS57104259 A JP S57104259A
Authority
JP
Japan
Prior art keywords
shaped
high dielectric
section
layer
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55180385A
Other languages
Japanese (ja)
Inventor
Hideshi Ito
Mitsuo Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55180385A priority Critical patent/JPS57104259A/en
Publication of JPS57104259A publication Critical patent/JPS57104259A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402Field plates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7835Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with asymmetrical source and drain regions, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To obtain a MOSFET, which has high dielectric resistance and ON- resistance thereof is decreased, by forming a high dielectric resisting N<-> layer shaped between a gate and an N<+> type drain by a section having small impurity concentration and a section having large one. CONSTITUTION:An N<-> type well region 11 is formed to the drain section of a P<-> type Si substrate 1 having low impurity concentration, and a thin gate SiO2 film 4 is shaped. A poly Si layer is deposited, and a gate electrode 5 is formed. Donar impurity ions are implanted using the gate electrode 5 as a mask, and the high dielectric resisting layer 6a is shaped in a self-matching shape. The second high dielectric resisting layer 6b is molded employing a photo-resist mask 12. A thick insulating film 13 is formed, and an N<+> source region 14 and an N<+> drain contact section 15 are diffused. An Al electrode and a field plate 9 are shaped.
JP55180385A 1980-12-22 1980-12-22 Metal oxide semiconductor device Pending JPS57104259A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55180385A JPS57104259A (en) 1980-12-22 1980-12-22 Metal oxide semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55180385A JPS57104259A (en) 1980-12-22 1980-12-22 Metal oxide semiconductor device

Publications (1)

Publication Number Publication Date
JPS57104259A true JPS57104259A (en) 1982-06-29

Family

ID=16082301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55180385A Pending JPS57104259A (en) 1980-12-22 1980-12-22 Metal oxide semiconductor device

Country Status (1)

Country Link
JP (1) JPS57104259A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0660419A2 (en) * 1993-12-23 1995-06-28 Texas Instruments Incorporated Drain/source doping profile of high voltage transistor for sub-micron CMOS processes
US6794722B2 (en) 2002-07-05 2004-09-21 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with reverse dopant grandient region
US7863648B2 (en) 2005-06-10 2011-01-04 Nec Corporation Field effect transistor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0660419A2 (en) * 1993-12-23 1995-06-28 Texas Instruments Incorporated Drain/source doping profile of high voltage transistor for sub-micron CMOS processes
EP0660419A3 (en) * 1993-12-23 1996-06-26 Texas Instruments Inc Drain/source doping profile of high voltage transistor for sub-micron CMOS processes.
US6794722B2 (en) 2002-07-05 2004-09-21 Mitsubishi Denki Kabushiki Kaisha Field effect transistor with reverse dopant grandient region
US7863648B2 (en) 2005-06-10 2011-01-04 Nec Corporation Field effect transistor

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