JPS5698842A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5698842A
JPS5698842A JP159880A JP159880A JPS5698842A JP S5698842 A JPS5698842 A JP S5698842A JP 159880 A JP159880 A JP 159880A JP 159880 A JP159880 A JP 159880A JP S5698842 A JPS5698842 A JP S5698842A
Authority
JP
Japan
Prior art keywords
substrate
film
semiconductor
wire
properties
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP159880A
Other languages
Japanese (ja)
Inventor
Keizo Sakiyama
Kiyoshi Inabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP159880A priority Critical patent/JPS5698842A/en
Publication of JPS5698842A publication Critical patent/JPS5698842A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To make the properties of semiconductor more stabilized, by forming the silicon nitride film containing excessive Si on the electrode wire on the semiconductor substrate. CONSTITUTION:The N layer is formed on the P type Si substrate 1. Opening window through the insulation film 2, Al wire 4 is formed. The silicon nitride film 5 containing excessive Si is stacked on it by plasma growth, by changing the ratio of mixed gases of SiH4, N2 and NH3 and its volume. The formation of the film 5 is performed at the temperature below 550 deg.C so that any unusual reactions between the Si substrate and wire may not occur. After the above, this undergoes the ohmic contact after heat treatment. As the film 5 contains excessive Si, the Al layer is fed with Si from the film 5, and the amount aborbed from the substrate is considerable decreased. Therefore the P-N junction on the substrate does not wear out and the stabler properties of the semiconductor is obtained.
JP159880A 1980-01-09 1980-01-09 Semiconductor device Pending JPS5698842A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP159880A JPS5698842A (en) 1980-01-09 1980-01-09 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP159880A JPS5698842A (en) 1980-01-09 1980-01-09 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5698842A true JPS5698842A (en) 1981-08-08

Family

ID=11505927

Family Applications (1)

Application Number Title Priority Date Filing Date
JP159880A Pending JPS5698842A (en) 1980-01-09 1980-01-09 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5698842A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48103277A (en) * 1972-04-12 1973-12-25
JPS4945685A (en) * 1972-09-04 1974-05-01
JPS51120668A (en) * 1975-04-16 1976-10-22 Sony Corp Semiconductor device manufacturing method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS48103277A (en) * 1972-04-12 1973-12-25
JPS4945685A (en) * 1972-09-04 1974-05-01
JPS51120668A (en) * 1975-04-16 1976-10-22 Sony Corp Semiconductor device manufacturing method

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