GB1142405A - Method of making a semiconductor device having two insulating coatings - Google Patents

Method of making a semiconductor device having two insulating coatings

Info

Publication number
GB1142405A
GB1142405A GB1030467A GB1030467A GB1142405A GB 1142405 A GB1142405 A GB 1142405A GB 1030467 A GB1030467 A GB 1030467A GB 1030467 A GB1030467 A GB 1030467A GB 1142405 A GB1142405 A GB 1142405A
Authority
GB
United Kingdom
Prior art keywords
coating
silicon
openings
insulating material
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1030467A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Radio Corporation of America
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp, Radio Corporation of America filed Critical RCA Corp
Publication of GB1142405A publication Critical patent/GB1142405A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers

Abstract

1,142,405. Etching. RADIO CORPORATION OF AMERICA. 3 March, 1967 [8 March, 1966; 9 June, 1966], No. 10304/67. Heading B6J. [Also in Division H1] In the manufacture of semi-conductor devices a coating of a first insulating material is formed on a semi-conductor body, and a pattern of openings formed in it. A coating of a second insulating material is then formed over the first coating and in the openings and a corresponding pattern of openings, formed in it by treatment with an etchant which etches the second insulating material at least twice as fast as the first. In a typical case using a silicon body the first coating is thermally grown silicon oxide and the second coating silicon oxide deposited pyrolytically from a silane and oxygen atmosphere. The pattern of openings is formed in both layers photo-lithographically using a specified etchant consisting of ammonium fluoride, hydrofluoric acid and water. Impurity is diffused in through the first openings and the areas exposed by the openings in the second layer are metallized after etching or pre-doping, or merely etched or rendered more conductive by impurity diffusion. Where the body is of silicon, germanium or gallium arsenide other suitable materials for the first coating are titanium carbide, silicon carbide, silicon oxynitride, and silicon nitride produced by reaction of ammonia and silane. Silicon monoxide, magnesium oxide and hydroxide and silicon oxide formed by the thermal decomposition of siloxanes are suitable for the second coating. Both coatings may include dopant materials if desired.
GB1030467A 1966-03-08 1967-03-03 Method of making a semiconductor device having two insulating coatings Expired GB1142405A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53273166A 1966-03-08 1966-03-08
US55649766A 1966-06-09 1966-06-09

Publications (1)

Publication Number Publication Date
GB1142405A true GB1142405A (en) 1969-02-05

Family

ID=27063931

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1030467A Expired GB1142405A (en) 1966-03-08 1967-03-03 Method of making a semiconductor device having two insulating coatings

Country Status (6)

Country Link
BR (2) BR6787596D0 (en)
DE (1) DE1614358C3 (en)
ES (2) ES337635A1 (en)
FR (1) FR1516406A (en)
GB (1) GB1142405A (en)
SE (1) SE346659B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2658304A1 (en) * 1975-12-24 1977-06-30 Tokyo Shibaura Electric Co SEMI-CONDUCTOR DEVICE
US4161743A (en) * 1977-03-28 1979-07-17 Tokyo Shibaura Electric Co., Ltd. Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat
US4560642A (en) * 1976-08-27 1985-12-24 Toyko Shibaura Electric Co., Ltd. Method of manufacturing a semiconductor device
US9577045B2 (en) 2014-08-04 2017-02-21 Fairchild Semiconductor Corporation Silicon carbide power bipolar devices with deep acceptor doping

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2658304A1 (en) * 1975-12-24 1977-06-30 Tokyo Shibaura Electric Co SEMI-CONDUCTOR DEVICE
US4224636A (en) * 1975-12-24 1980-09-23 Tokyo Shibaura Electric Co., Ltd. Semiconductor device with thermally compensating SiO2 -silicate glass-SiC passivation layer
US4560642A (en) * 1976-08-27 1985-12-24 Toyko Shibaura Electric Co., Ltd. Method of manufacturing a semiconductor device
US4161743A (en) * 1977-03-28 1979-07-17 Tokyo Shibaura Electric Co., Ltd. Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat
US9577045B2 (en) 2014-08-04 2017-02-21 Fairchild Semiconductor Corporation Silicon carbide power bipolar devices with deep acceptor doping

Also Published As

Publication number Publication date
BR6787595D0 (en) 1973-01-11
SE346659B (en) 1972-07-10
DE1614358B2 (en) 1973-04-05
ES349369A1 (en) 1969-09-16
ES337635A1 (en) 1968-06-16
DE1614358A1 (en) 1971-05-19
BR6787596D0 (en) 1973-02-15
DE1614358C3 (en) 1974-08-22
FR1516406A (en) 1968-03-08

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