ES349369A1 - Method of making a semiconductor device having two insulating coatings - Google Patents

Method of making a semiconductor device having two insulating coatings

Info

Publication number
ES349369A1
ES349369A1 ES349369A ES349369A ES349369A1 ES 349369 A1 ES349369 A1 ES 349369A1 ES 349369 A ES349369 A ES 349369A ES 349369 A ES349369 A ES 349369A ES 349369 A1 ES349369 A1 ES 349369A1
Authority
ES
Spain
Prior art keywords
coating
silicon
openings
insulating material
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES349369A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Radio Corporation of America
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp, Radio Corporation of America filed Critical RCA Corp
Publication of ES349369A1 publication Critical patent/ES349369A1/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers
    • H01L21/31111Etching inorganic layers by chemical means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3085Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by their behaviour during the process, e.g. soluble masks, redeposited masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • H01L21/311Etching the insulating layers by chemical or physical means
    • H01L21/31105Etching inorganic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

In the manufacture of semi-conductor devices a coating of a first insulating material is formed on a semi-conductor body, and a pattern of openings formed in it. A coating of a second insulating material is then formed over the first coating and in the openings and a corresponding pattern of openings, formed in it by treatment with an etchant which etches the second insulating material at least twice as fast as the first. In a typical case using a silicon body the first coating is thermally grown silicon oxide and the second coating silicon oxide deposited pyrolytically from a silane and oxygen atmosphere. The pattern of openings is formed in both layers photo-lithographically using a specified etchant consisting of ammonium fluoride, hydrofluoric acid and water. Impurity is diffused in through the first openings and the areas exposed by the openings in the second layer are metallized after etching or pre-doping, or merely etched or rendered more conductive by impurity diffusion. Where the body is of silicon, germanium or gallium arsenide other suitable materials for the first coating are titanium carbide, silicon carbide, silicon oxynitride, and silicon nitride produced by reaction of ammonia and silane. Silicon monoxide, magnesium oxide and hydroxide and silicon oxide formed by the thermal decomposition of siloxanes are suitable for the second coating. Both coatings may include dopant materials if desired.
ES349369A 1966-03-08 1968-01-16 Method of making a semiconductor device having two insulating coatings Expired ES349369A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53273166A 1966-03-08 1966-03-08
US55649766A 1966-06-09 1966-06-09

Publications (1)

Publication Number Publication Date
ES349369A1 true ES349369A1 (en) 1969-09-16

Family

ID=27063931

Family Applications (2)

Application Number Title Priority Date Filing Date
ES337635A Expired ES337635A1 (en) 1966-03-08 1967-03-06 Method of making a semiconductor device having two insulating coatings
ES349369A Expired ES349369A1 (en) 1966-03-08 1968-01-16 Method of making a semiconductor device having two insulating coatings

Family Applications Before (1)

Application Number Title Priority Date Filing Date
ES337635A Expired ES337635A1 (en) 1966-03-08 1967-03-06 Method of making a semiconductor device having two insulating coatings

Country Status (6)

Country Link
BR (2) BR6787595D0 (en)
DE (1) DE1614358C3 (en)
ES (2) ES337635A1 (en)
FR (1) FR1516406A (en)
GB (1) GB1142405A (en)
SE (1) SE346659B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2658304C2 (en) * 1975-12-24 1984-12-20 Tokyo Shibaura Electric Co., Ltd., Kawasaki, Kanagawa Semiconductor device
GB1548520A (en) * 1976-08-27 1979-07-18 Tokyo Shibaura Electric Co Method of manufacturing a semiconductor device
US4161743A (en) * 1977-03-28 1979-07-17 Tokyo Shibaura Electric Co., Ltd. Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat
US9577045B2 (en) 2014-08-04 2017-02-21 Fairchild Semiconductor Corporation Silicon carbide power bipolar devices with deep acceptor doping

Also Published As

Publication number Publication date
ES337635A1 (en) 1968-06-16
GB1142405A (en) 1969-02-05
SE346659B (en) 1972-07-10
DE1614358C3 (en) 1974-08-22
DE1614358B2 (en) 1973-04-05
BR6787596D0 (en) 1973-02-15
BR6787595D0 (en) 1973-01-11
DE1614358A1 (en) 1971-05-19
FR1516406A (en) 1968-03-08

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