JPS5698839A - Integrated circuit for dc load - Google Patents
Integrated circuit for dc loadInfo
- Publication number
- JPS5698839A JPS5698839A JP164380A JP164380A JPS5698839A JP S5698839 A JPS5698839 A JP S5698839A JP 164380 A JP164380 A JP 164380A JP 164380 A JP164380 A JP 164380A JP S5698839 A JPS5698839 A JP S5698839A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- layers
- transistor
- separated
- load
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To prevent erroneous operations to be caused by the parasitic transistor effects, by forming the capacitive or inductive DC load and the transistor for driving in the epitaxially grown layer separated with the established interval and by giving to such middle part of the layer within the epitaxial layer the preliminerily established voltage. CONSTITUTION:The N type epitaxially grown layer on the P type substrate having the N<+> buried layer is separated by P layers 56, 58. The base 62, 64 are formed in the N layers 54A, 56, the emitters 66, 68, 70 are formed in the layers 62, 54A, 540, and the transistor 60 is formed. The electrode is formed over the layers 64, 70, and the substrate 50 and the separated layer 540 is connected and earthed. The turnover of N layer 54A, 540 by Al electrode is prevented by the layers 68, 70. In this formation, the parasitic transistor 80 is formed through the layers 54A, 54B. When the transistor 60 is set in motion and the layer 54A goes below the electric potential on earthing, the current is fed for the most part from the layer 540 to the transistor 80. There are hardly any undesirable effects to the DC load circuit in the layers 54B, 54C, and the erroneous operations can be prevented.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP164380A JPS5698839A (en) | 1980-01-10 | 1980-01-10 | Integrated circuit for dc load |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP164380A JPS5698839A (en) | 1980-01-10 | 1980-01-10 | Integrated circuit for dc load |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5698839A true JPS5698839A (en) | 1981-08-08 |
Family
ID=11507196
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP164380A Pending JPS5698839A (en) | 1980-01-10 | 1980-01-10 | Integrated circuit for dc load |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5698839A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5877254A (en) * | 1981-11-02 | 1983-05-10 | Oki Electric Ind Co Ltd | Integrated logic circuit device |
JPS58186947A (en) * | 1982-04-26 | 1983-11-01 | Nec Corp | Semiconductor device |
JPS58213446A (en) * | 1982-06-04 | 1983-12-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit |
JPS58213445A (en) * | 1982-06-04 | 1983-12-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit |
JPS5932150A (en) * | 1982-08-18 | 1984-02-21 | Toshiba Corp | Bipolar monolithic ic |
US7755168B2 (en) | 2006-10-19 | 2010-07-13 | Mitsubishi Electric Corporation | Semiconductor device provided with floating electrode |
JP2016004883A (en) * | 2014-06-16 | 2016-01-12 | 富士電機株式会社 | Semiconductor integrated circuit device |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49123589A (en) * | 1973-03-30 | 1974-11-26 |
-
1980
- 1980-01-10 JP JP164380A patent/JPS5698839A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49123589A (en) * | 1973-03-30 | 1974-11-26 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5877254A (en) * | 1981-11-02 | 1983-05-10 | Oki Electric Ind Co Ltd | Integrated logic circuit device |
JPH0121632B2 (en) * | 1981-11-02 | 1989-04-21 | Oki Electric Ind Co Ltd | |
JPS58186947A (en) * | 1982-04-26 | 1983-11-01 | Nec Corp | Semiconductor device |
JPS58213446A (en) * | 1982-06-04 | 1983-12-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit |
JPS58213445A (en) * | 1982-06-04 | 1983-12-12 | Sanyo Electric Co Ltd | Semiconductor integrated circuit |
JPS5932150A (en) * | 1982-08-18 | 1984-02-21 | Toshiba Corp | Bipolar monolithic ic |
US7755168B2 (en) | 2006-10-19 | 2010-07-13 | Mitsubishi Electric Corporation | Semiconductor device provided with floating electrode |
DE102007034349B4 (en) * | 2006-10-19 | 2012-08-23 | Mitsubishi Electric Corp. | Semiconductor device provided with a floating electrode |
JP2016004883A (en) * | 2014-06-16 | 2016-01-12 | 富士電機株式会社 | Semiconductor integrated circuit device |
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