JPS5690489A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS5690489A
JPS5690489A JP16797979A JP16797979A JPS5690489A JP S5690489 A JPS5690489 A JP S5690489A JP 16797979 A JP16797979 A JP 16797979A JP 16797979 A JP16797979 A JP 16797979A JP S5690489 A JPS5690489 A JP S5690489A
Authority
JP
Japan
Prior art keywords
read
line
lines
data line
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16797979A
Other languages
Japanese (ja)
Other versions
JPS5823675B2 (en
Inventor
Tsuneo Mano
Nobuaki Ieda
Junichi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP54167979A priority Critical patent/JPS5823675B2/en
Publication of JPS5690489A publication Critical patent/JPS5690489A/en
Publication of JPS5823675B2 publication Critical patent/JPS5823675B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store

Abstract

PURPOSE:To make read-out speed high by providig the two read-only lines of mutually different potentials. CONSTITUTION:To carry out read operation, first a write control line 5'' is set at low voltage, by which an MOSFET2''' is made nonconducting to disconnect a write common line 5 from a data line 2'. Next the MOSFET21 or 24 in a read unit circuit 20 is made conducting by the specific Ai signal. As a result, the state is brought out in which a current route is either formed or not formed between read-only lines 16- 17 according to the potential state of the data line 2'. The potential change of this read-only line 16 is fetched in an output terminal 8 via a buffer 7.
JP54167979A 1979-12-24 1979-12-24 semiconductor storage device Expired JPS5823675B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54167979A JPS5823675B2 (en) 1979-12-24 1979-12-24 semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54167979A JPS5823675B2 (en) 1979-12-24 1979-12-24 semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS5690489A true JPS5690489A (en) 1981-07-22
JPS5823675B2 JPS5823675B2 (en) 1983-05-17

Family

ID=15859554

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54167979A Expired JPS5823675B2 (en) 1979-12-24 1979-12-24 semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS5823675B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG113403A1 (en) * 2001-07-03 2005-08-29 Agilent Technologies Inc Low-voltage digital rom circuit and method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG113403A1 (en) * 2001-07-03 2005-08-29 Agilent Technologies Inc Low-voltage digital rom circuit and method

Also Published As

Publication number Publication date
JPS5823675B2 (en) 1983-05-17

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