JPS554686A - Microprogram control unit - Google Patents

Microprogram control unit

Info

Publication number
JPS554686A
JPS554686A JP7840778A JP7840778A JPS554686A JP S554686 A JPS554686 A JP S554686A JP 7840778 A JP7840778 A JP 7840778A JP 7840778 A JP7840778 A JP 7840778A JP S554686 A JPS554686 A JP S554686A
Authority
JP
Japan
Prior art keywords
unit
microorder
circuit
variable length
word
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7840778A
Other languages
Japanese (ja)
Inventor
Shuichi Hanatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7840778A priority Critical patent/JPS554686A/en
Publication of JPS554686A publication Critical patent/JPS554686A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To realize a high-performance control for the microprogram by recording the variable length microorder word in plural units on one line and thus increasing the memory capacity for the microorder memory unit.
CONSTITUTION: Microorder memory unit 10 stores plural units of the variable length microorder word composed of an optional integer-fold length as much as the basic unit length, and the variable length microorder word to be executed is selected from unit 10 via order setting circuit 20. Then the output of circuit 10 is accumulated in control register 30, and the fixed pattern is generated via default pattern generation circuit 50 at the fields other than the variable length of register 30. The next address of unit 10 is grown based on the output of test circuit 70 which detects the state of unit 60, and at the same time circuit 20 is controlled by address generation circuit 110. In this way, the memory capacity of unit 10 can be increased, ensuring a high-performance control for the microprogram.
COPYRIGHT: (C)1980,JPO&Japio
JP7840778A 1978-06-27 1978-06-27 Microprogram control unit Pending JPS554686A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7840778A JPS554686A (en) 1978-06-27 1978-06-27 Microprogram control unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7840778A JPS554686A (en) 1978-06-27 1978-06-27 Microprogram control unit

Publications (1)

Publication Number Publication Date
JPS554686A true JPS554686A (en) 1980-01-14

Family

ID=13661167

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7840778A Pending JPS554686A (en) 1978-06-27 1978-06-27 Microprogram control unit

Country Status (1)

Country Link
JP (1) JPS554686A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58118204A (en) * 1982-01-07 1983-07-14 昭和電工株式会社 Manufacture of carbon product
JP2008236838A (en) * 2007-03-16 2008-10-02 Kawamura Electric Inc Inner apparatus structure of distribution board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58118204A (en) * 1982-01-07 1983-07-14 昭和電工株式会社 Manufacture of carbon product
JPH0241401B2 (en) * 1982-01-07 1990-09-17
JP2008236838A (en) * 2007-03-16 2008-10-02 Kawamura Electric Inc Inner apparatus structure of distribution board

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