JPS5687370A - Semiconductor memory storage - Google Patents

Semiconductor memory storage

Info

Publication number
JPS5687370A
JPS5687370A JP16523179A JP16523179A JPS5687370A JP S5687370 A JPS5687370 A JP S5687370A JP 16523179 A JP16523179 A JP 16523179A JP 16523179 A JP16523179 A JP 16523179A JP S5687370 A JPS5687370 A JP S5687370A
Authority
JP
Japan
Prior art keywords
region
semiconductor layer
electric charge
memory storage
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16523179A
Other languages
Japanese (ja)
Other versions
JPS5828748B2 (en
Inventor
Junji Sakurai
Nobuo Sasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP54165231A priority Critical patent/JPS5828748B2/en
Priority to EP80304496A priority patent/EP0030856B1/en
Priority to DE8080304496T priority patent/DE3067215D1/en
Publication of JPS5687370A publication Critical patent/JPS5687370A/en
Publication of JPS5828748B2 publication Critical patent/JPS5828748B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025—Channel region of field-effect devices
    • H01L29/1029—Channel region of field-effect devices of field-effect transistors
    • H01L29/1033—Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To improve the storing efficiency of electric charge for the subject semiconductor memory storage by a method wherein a recoupling center region is formed at the lower part of the channel section of the memory cell performing the writing-in of informations by storing electric charge on a floating semiconductor substrate using charging pumping. CONSTITUTION:A p<-> type single crystal silicon semiconductor substrate layer 4S, an n<+> type source region 9S, an n<+> type drain region 9D, a gate insulation film 7 and a polycrystalline silicon gate electrode 8 are formed, and in addition, a recoupling center region 6 is formed by injecting a life time killer such as gold, zinc, manganese, iron or the like to the lower part of the channel section in the semiconductor layer which is electrically floating. As a result, the carrier injected into the semiconductor layer 4S is recoupled on the region 6 and the semiconductor layer 4S is deviated to the positive or the negative direction.
JP54165231A 1979-12-13 1979-12-19 semiconductor storage device Expired JPS5828748B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP54165231A JPS5828748B2 (en) 1979-12-19 1979-12-19 semiconductor storage device
EP80304496A EP0030856B1 (en) 1979-12-13 1980-12-12 Charge-pumping semiconductor memory cell comprising a charge-storage region and memory device using such a cell
DE8080304496T DE3067215D1 (en) 1979-12-13 1980-12-12 Charge-pumping semiconductor memory cell comprising a charge-storage region and memory device using such a cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54165231A JPS5828748B2 (en) 1979-12-19 1979-12-19 semiconductor storage device

Publications (2)

Publication Number Publication Date
JPS5687370A true JPS5687370A (en) 1981-07-15
JPS5828748B2 JPS5828748B2 (en) 1983-06-17

Family

ID=15808344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54165231A Expired JPS5828748B2 (en) 1979-12-13 1979-12-19 semiconductor storage device

Country Status (1)

Country Link
JP (1) JPS5828748B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61267361A (en) * 1985-05-22 1986-11-26 Nec Corp Semiconductor memory device
JPS61267362A (en) * 1985-05-22 1986-11-26 Nec Corp Semiconductor memory device
US5449941A (en) * 1991-10-29 1995-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61267361A (en) * 1985-05-22 1986-11-26 Nec Corp Semiconductor memory device
JPS61267362A (en) * 1985-05-22 1986-11-26 Nec Corp Semiconductor memory device
US5449941A (en) * 1991-10-29 1995-09-12 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device
US5629222A (en) * 1991-10-29 1997-05-13 Semiconductor Energy Laboratory Co., Ltd. Method of forming semiconductor memory device by selectively forming an insulating film on the drain region

Also Published As

Publication number Publication date
JPS5828748B2 (en) 1983-06-17

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