JPS5683133A - Pulse counter - Google Patents
Pulse counterInfo
- Publication number
- JPS5683133A JPS5683133A JP15994879A JP15994879A JPS5683133A JP S5683133 A JPS5683133 A JP S5683133A JP 15994879 A JP15994879 A JP 15994879A JP 15994879 A JP15994879 A JP 15994879A JP S5683133 A JPS5683133 A JP S5683133A
- Authority
- JP
- Japan
- Prior art keywords
- input
- pulse
- output
- fed
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/02—Input circuits
Landscapes
- Manipulation Of Pulses (AREA)
- Measuring Phase Differences (AREA)
Abstract
PURPOSE:To enable excellent operation without count error even with deficient state of input pulses and to quicken the response speed, by discriminating the presence and the phase order of multiphase pulse incoming from the state of input register and status register. CONSTITUTION:A signal from a transmitter (not shown) is input to input terminals A1-A3 of an input register 1 and led to input terminals D1-D3. The data at the input terminals D1-D3 are latched at the rise of the pulse fed to the terminal T and output to output terminals Q1-Q3. A part of the output is fed to a status register 2 and the input is latched with the rise of the clock at ''1'' level input to the terminal E. The output of the registers 1 and 2 is fed to OR circuits 3a-3c and 4a-4c to enable the detection of the forward and reverse pulses respectively. Thus, even if the state of input pulse is deficient or the pulse is reversed due to negative amount of measurements, the counter can operate in excellent manner without count error, allowing to quicken the response speed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15994879A JPS5683133A (en) | 1979-12-10 | 1979-12-10 | Pulse counter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15994879A JPS5683133A (en) | 1979-12-10 | 1979-12-10 | Pulse counter |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5683133A true JPS5683133A (en) | 1981-07-07 |
JPS6242416B2 JPS6242416B2 (en) | 1987-09-08 |
Family
ID=15704648
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15994879A Granted JPS5683133A (en) | 1979-12-10 | 1979-12-10 | Pulse counter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5683133A (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4992971A (en) * | 1973-01-09 | 1974-09-04 | ||
JPS53106565A (en) * | 1977-02-28 | 1978-09-16 | Sharp Corp | Signal counter |
JPS5437675A (en) * | 1977-08-31 | 1979-03-20 | Toshiba Corp | Pulse count circuit |
-
1979
- 1979-12-10 JP JP15994879A patent/JPS5683133A/en active Granted
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4992971A (en) * | 1973-01-09 | 1974-09-04 | ||
JPS53106565A (en) * | 1977-02-28 | 1978-09-16 | Sharp Corp | Signal counter |
JPS5437675A (en) * | 1977-08-31 | 1979-03-20 | Toshiba Corp | Pulse count circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6242416B2 (en) | 1987-09-08 |
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