JPS5658270A - Junction type field-effect transistor - Google Patents

Junction type field-effect transistor

Info

Publication number
JPS5658270A
JPS5658270A JP13343479A JP13343479A JPS5658270A JP S5658270 A JPS5658270 A JP S5658270A JP 13343479 A JP13343479 A JP 13343479A JP 13343479 A JP13343479 A JP 13343479A JP S5658270 A JPS5658270 A JP S5658270A
Authority
JP
Japan
Prior art keywords
region
film
section
type
whole surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13343479A
Other languages
Japanese (ja)
Inventor
Toru Mochizuki
Masahiro Kashiwagi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
CHO LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI, CHO LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP13343479A priority Critical patent/JPS5658270A/en
Publication of JPS5658270A publication Critical patent/JPS5658270A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/808Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain minute structure and increase the operational speed of a J-FET by a mechanism wherein at least one among electrodes formed to the FET is made up by using a metallic silicide. CONSTITUTION:A p type layer 2 is grown on an n type Si substrate 1 in an epitaxial shape, the whole surface is coated with a thick SiO2 film 4, a section on a region where an element is formed is removed, the section is covered with a thin SiO2 film 5. An opening section 6 is bored to the film 5, an n<+> type gate region 7 is made up into the layer 2 in a diffusion shape, Mo and Si are simultaneously evaporated on the whole surface in vacuum, and a gate electrode 8 of MoSi2 extending on an end section of the film 5 and contacting with the region 7 is formed by means of CF4 plasma etching. The film 5 on the region where the element is formed is removed by means of etching using the electrode 8 as a mask, and a p<+> type source region 9 and a drain region 10 are made up into the layer 2 exposing at both sides of the region 7 in diffusion shapes. An SiO2 film 11 is formed on the whole surface by means of a CVD method, windows are opened, and Al electrodes 12, 13 are fitted to the regions 9, 10.
JP13343479A 1979-10-16 1979-10-16 Junction type field-effect transistor Pending JPS5658270A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13343479A JPS5658270A (en) 1979-10-16 1979-10-16 Junction type field-effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13343479A JPS5658270A (en) 1979-10-16 1979-10-16 Junction type field-effect transistor

Publications (1)

Publication Number Publication Date
JPS5658270A true JPS5658270A (en) 1981-05-21

Family

ID=15104677

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13343479A Pending JPS5658270A (en) 1979-10-16 1979-10-16 Junction type field-effect transistor

Country Status (1)

Country Link
JP (1) JPS5658270A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213171A (en) * 1983-05-19 1984-12-03 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US5510632A (en) * 1993-04-19 1996-04-23 General Electric Company Silicon carbide junction field effect transistor device for high temperature applications

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59213171A (en) * 1983-05-19 1984-12-03 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US5510632A (en) * 1993-04-19 1996-04-23 General Electric Company Silicon carbide junction field effect transistor device for high temperature applications

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