JPS5654047A - Compound semiconductor device - Google Patents

Compound semiconductor device

Info

Publication number
JPS5654047A
JPS5654047A JP12971679A JP12971679A JPS5654047A JP S5654047 A JPS5654047 A JP S5654047A JP 12971679 A JP12971679 A JP 12971679A JP 12971679 A JP12971679 A JP 12971679A JP S5654047 A JPS5654047 A JP S5654047A
Authority
JP
Japan
Prior art keywords
case
gaas
heat
semiconductor device
compound semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP12971679A
Other languages
Japanese (ja)
Other versions
JPS6322060B2 (en
Inventor
Hiroaki Ishiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12971679A priority Critical patent/JPS5654047A/en
Publication of JPS5654047A publication Critical patent/JPS5654047A/en
Publication of JPS6322060B2 publication Critical patent/JPS6322060B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
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    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144Gold [Au] as principal constituent
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
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    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • H01L2224/83805Soldering or alloying involving forming a eutectic alloy at the bonding interface
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    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
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    • H01L2924/01Chemical elements
    • H01L2924/01042Molybdenum [Mo]
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    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
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    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
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    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15165Monolayer substrate
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    • H01L2924/161Cap
    • H01L2924/166Material
    • H01L2924/16786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/16787Ceramics, e.g. crystalline carbides, nitrides or oxides
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    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901Structure
    • H01L2924/1904Component type
    • H01L2924/19043Component type being a resistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To improve the reliability and the performance of the compound semiconductor device with lowering of heat resistance by applying Au to the back of a GaAs pellet through at least one of Pt, W and Mo. CONSTITUTION:Ti 5, Pt 6 and Au 7 are continuously evaporated on the ground back of a GaAs substrate 4 having a source, a gate and a drain electrode 1-3 on the surface. The substrate is separated into pellets 8. While a case 9 is heated, the back of the pellets 8 is placed on an AuSi solder 10 fused in N2 until they are broken in sufficiently and then fixed in the case after cooled. Each electrode and the case 9 are connected and sealed with a ceramic cover. This enables more effective dissipation of heat them it would when the back is made of Au alone thereby significantly easing adverse effect on the micro wave characteristics and the reliability of a GaAs FET due to heat.
JP12971679A 1979-10-08 1979-10-08 Compound semiconductor device Granted JPS5654047A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12971679A JPS5654047A (en) 1979-10-08 1979-10-08 Compound semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12971679A JPS5654047A (en) 1979-10-08 1979-10-08 Compound semiconductor device

Publications (2)

Publication Number Publication Date
JPS5654047A true JPS5654047A (en) 1981-05-13
JPS6322060B2 JPS6322060B2 (en) 1988-05-10

Family

ID=15016437

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12971679A Granted JPS5654047A (en) 1979-10-08 1979-10-08 Compound semiconductor device

Country Status (1)

Country Link
JP (1) JPS5654047A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6144492A (en) * 1985-07-22 1986-03-04 Hitachi Ltd Semiconductor device
JPS6220338A (en) * 1985-07-19 1987-01-28 Oki Electric Ind Co Ltd Manufacture of semiconductor device
EP0253691A2 (en) * 1986-06-17 1988-01-20 Fairchild Semiconductor Corporation Silicon die bonding process
JPH01149428A (en) * 1987-12-07 1989-06-12 Nec Corp Semiconductor device
JPH01299114A (en) * 1988-04-29 1989-12-01 Fael Sa Guide apparatus for frame of box having non-circular section
US5077599A (en) * 1989-06-16 1991-12-31 Sumitomo Electric Industries, Ltd. Electrode structure for iii-v compound semiconductor element and method of manufacturing the same
US5179041A (en) * 1989-06-16 1993-01-12 Sumitomo Electric Industries, Ltd. Method for manufacturing an electrode structure for III-V compound semiconductor element
US6577005B1 (en) * 1997-11-27 2003-06-10 Kabushiki Kaishia Toshiba Fine protuberance structure and method of production thereof
GB2427071B (en) * 2005-06-07 2011-03-09 Denso Corp Semiconductor device having SiC substrate and method for manufacturing the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5353256A (en) * 1976-10-25 1978-05-15 Mitsubishi Electric Corp Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5353256A (en) * 1976-10-25 1978-05-15 Mitsubishi Electric Corp Semiconductor device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6220338A (en) * 1985-07-19 1987-01-28 Oki Electric Ind Co Ltd Manufacture of semiconductor device
JPS6144492A (en) * 1985-07-22 1986-03-04 Hitachi Ltd Semiconductor device
EP0253691A2 (en) * 1986-06-17 1988-01-20 Fairchild Semiconductor Corporation Silicon die bonding process
JPH01149428A (en) * 1987-12-07 1989-06-12 Nec Corp Semiconductor device
JPH01299114A (en) * 1988-04-29 1989-12-01 Fael Sa Guide apparatus for frame of box having non-circular section
US5077599A (en) * 1989-06-16 1991-12-31 Sumitomo Electric Industries, Ltd. Electrode structure for iii-v compound semiconductor element and method of manufacturing the same
US5179041A (en) * 1989-06-16 1993-01-12 Sumitomo Electric Industries, Ltd. Method for manufacturing an electrode structure for III-V compound semiconductor element
US6577005B1 (en) * 1997-11-27 2003-06-10 Kabushiki Kaishia Toshiba Fine protuberance structure and method of production thereof
GB2427071B (en) * 2005-06-07 2011-03-09 Denso Corp Semiconductor device having SiC substrate and method for manufacturing the same

Also Published As

Publication number Publication date
JPS6322060B2 (en) 1988-05-10

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