JPS5648163A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS5648163A JPS5648163A JP12410479A JP12410479A JPS5648163A JP S5648163 A JPS5648163 A JP S5648163A JP 12410479 A JP12410479 A JP 12410479A JP 12410479 A JP12410479 A JP 12410479A JP S5648163 A JPS5648163 A JP S5648163A
- Authority
- JP
- Japan
- Prior art keywords
- tab
- frame
- connecting pieces
- lead frame
- pieces
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49544—Deformation absorbing parts in the lead frame plane, e.g. meanderline shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To release stress occurring in connecting parts and make the dimensions and shape of a frame stable, when supporting the opposing two sides of a semiconductor element mounting tab formed in a lead frame with connecting pieces, by providing bent parts for these connecting pieces. CONSTITUTION:In the center of a lead frame, a semiconductor element mounting tab 2113 is made, it is supported with connecting pieces 2112 which are formed integrally with both ends of the fame, and to the tab 2113, plural lead pieces 2111 projected from both ends of the frame at intervals are faced. In this construction, the connecting pieces 2112 connected with the opposing two sides of the tab 2113 are not formed in the same plane as the tab 2113, but bent parts 2112a are provided in their connecting portions. By so doing, generation of tensile stress can be prevented without preparing a special stress absorbing part and the deformation of the frame can be avoided easily.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12410479A JPS5648163A (en) | 1979-09-28 | 1979-09-28 | Lead frame |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12410479A JPS5648163A (en) | 1979-09-28 | 1979-09-28 | Lead frame |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5648163A true JPS5648163A (en) | 1981-05-01 |
Family
ID=14877015
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12410479A Pending JPS5648163A (en) | 1979-09-28 | 1979-09-28 | Lead frame |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5648163A (en) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5990512A (en) * | 1982-11-15 | 1984-05-25 | 近藤 吉秋 | Production of modified sponge puff |
JPS59159959U (en) * | 1983-04-11 | 1984-10-26 | 新光電気工業株式会社 | lead frame |
JPS6053206U (en) * | 1983-09-19 | 1985-04-15 | 株式会社パンジー | Hydrous polyurethane cosmetic puff |
JPS61245556A (en) * | 1985-04-24 | 1986-10-31 | Hitachi Ltd | Lead frame |
JPS62140729U (en) * | 1986-02-27 | 1987-09-05 | ||
JPS63232359A (en) * | 1986-11-24 | 1988-09-28 | アメリカン テレフォン アンド テレグラフ カムパニー | Semiconductor integrated circuit package |
USRE34269E (en) * | 1986-11-24 | 1993-06-01 | At&T Bell Laboratories | Semiconductor integrated circuit packages |
EP0902473A3 (en) * | 1997-09-09 | 2001-11-21 | Texas Instruments Incorporated | Improvements in or relating to leadframes |
-
1979
- 1979-09-28 JP JP12410479A patent/JPS5648163A/en active Pending
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5990512A (en) * | 1982-11-15 | 1984-05-25 | 近藤 吉秋 | Production of modified sponge puff |
JPS59159959U (en) * | 1983-04-11 | 1984-10-26 | 新光電気工業株式会社 | lead frame |
JPS6053206U (en) * | 1983-09-19 | 1985-04-15 | 株式会社パンジー | Hydrous polyurethane cosmetic puff |
JPS64827Y2 (en) * | 1983-09-19 | 1989-01-10 | ||
JPS61245556A (en) * | 1985-04-24 | 1986-10-31 | Hitachi Ltd | Lead frame |
JPS62140729U (en) * | 1986-02-27 | 1987-09-05 | ||
JPS63232359A (en) * | 1986-11-24 | 1988-09-28 | アメリカン テレフォン アンド テレグラフ カムパニー | Semiconductor integrated circuit package |
USRE34269E (en) * | 1986-11-24 | 1993-06-01 | At&T Bell Laboratories | Semiconductor integrated circuit packages |
EP0902473A3 (en) * | 1997-09-09 | 2001-11-21 | Texas Instruments Incorporated | Improvements in or relating to leadframes |
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