JPS5644196A - Nonvolatile semiconductor memory device - Google Patents

Nonvolatile semiconductor memory device

Info

Publication number
JPS5644196A
JPS5644196A JP11819779A JP11819779A JPS5644196A JP S5644196 A JPS5644196 A JP S5644196A JP 11819779 A JP11819779 A JP 11819779A JP 11819779 A JP11819779 A JP 11819779A JP S5644196 A JPS5644196 A JP S5644196A
Authority
JP
Japan
Prior art keywords
voltage
breakdown
drain
memory element
junction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11819779A
Other languages
Japanese (ja)
Inventor
Shuichi Oya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11819779A priority Critical patent/JPS5644196A/en
Publication of JPS5644196A publication Critical patent/JPS5644196A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits

Landscapes

  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)

Abstract

PURPOSE:To reduce the width of a programmable program voltage by preventing the generation of a source-drain brakedown in the write operation of a channel electron application type memory element. CONSTITUTION:To respective address line 53, one P-N junction breakdown method 56 each is added. The breakdown voltage of breakdown method 56 is set lower than the source-drain breakdown voltage of a memory element in write operation. Load curve 72 has constant voltage characteristics at breakdown voltage 75 of added P-N junction. As program voltage VP is increased, load curve 72 moves right, but a voltage higher than breakdown voltage 75 of the added P-N junction is never applied to the drain of the memory element, so that the generation of the source-drain breakdown of the memory element will be prevented.
JP11819779A 1979-09-14 1979-09-14 Nonvolatile semiconductor memory device Pending JPS5644196A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11819779A JPS5644196A (en) 1979-09-14 1979-09-14 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11819779A JPS5644196A (en) 1979-09-14 1979-09-14 Nonvolatile semiconductor memory device

Publications (1)

Publication Number Publication Date
JPS5644196A true JPS5644196A (en) 1981-04-23

Family

ID=14730568

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11819779A Pending JPS5644196A (en) 1979-09-14 1979-09-14 Nonvolatile semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS5644196A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506495A1 (en) * 1981-05-22 1982-11-26 Hitachi Ltd ELECTRICALLY PROGRAMMABLE DEAD MEMORY

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2506495A1 (en) * 1981-05-22 1982-11-26 Hitachi Ltd ELECTRICALLY PROGRAMMABLE DEAD MEMORY

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