JPS5637732A - Lsi parameter setting system - Google Patents

Lsi parameter setting system

Info

Publication number
JPS5637732A
JPS5637732A JP11246379A JP11246379A JPS5637732A JP S5637732 A JPS5637732 A JP S5637732A JP 11246379 A JP11246379 A JP 11246379A JP 11246379 A JP11246379 A JP 11246379A JP S5637732 A JPS5637732 A JP S5637732A
Authority
JP
Japan
Prior art keywords
terminals
supplied
parameter setting
signals
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11246379A
Other languages
Japanese (ja)
Inventor
Hiroshi Yasukawa
Tadakatsu Kimura
Nobuhiko Owada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11246379A priority Critical patent/JPS5637732A/en
Publication of JPS5637732A publication Critical patent/JPS5637732A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1731—Optimisation thereof

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microcomputers (AREA)
  • Logic Circuits (AREA)

Abstract

PURPOSE:To minimize the number of the parameter terminals in the LSI, by supplying the logic level of the value M supplied from a unit of the parameter setting to the inverter circuit in the form of the setting signal. CONSTITUTION:The logic level of the value M supplied from a unit of the parameter setting terminal S is supplied to the inverters INV1-INVM-1 having the different logic threshold levels, and each output signal is supplied to the input terminals a1-aM-1 each in the circuit network 1. This network 1 has such constitution in that such signal a to permit to give a control to the control terminal (selection terminal) of the parameter setting circuit having the general form, i.e., comprising the combined switch of the input M is delivered to the terminals S1-SN and against the signals A1-AM-1 arriving at the terminals a1-aM-1, and consists of any one of various combination gets such as the ROM, PLA and others. And the relationship is shown in the table 50 between the set signals V1-VM supplied through the terminal S and the signals which are delivered to the terminals a1-aM-1 plus the terminals S1-SN each. Thus one input signal is selected through the different combinations of the output signals at the selection terminals S1-SN.
JP11246379A 1979-09-04 1979-09-04 Lsi parameter setting system Pending JPS5637732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11246379A JPS5637732A (en) 1979-09-04 1979-09-04 Lsi parameter setting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11246379A JPS5637732A (en) 1979-09-04 1979-09-04 Lsi parameter setting system

Publications (1)

Publication Number Publication Date
JPS5637732A true JPS5637732A (en) 1981-04-11

Family

ID=14587258

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11246379A Pending JPS5637732A (en) 1979-09-04 1979-09-04 Lsi parameter setting system

Country Status (1)

Country Link
JP (1) JPS5637732A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6076084A (en) * 1983-09-30 1985-04-30 Fujitsu Ltd Semiconductor integrated circuit device
JPS61102342A (en) * 1984-10-22 1986-05-21 Hino Motors Ltd Control unit for automatic transmission system control
US5986468A (en) * 1991-03-06 1999-11-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6076084A (en) * 1983-09-30 1985-04-30 Fujitsu Ltd Semiconductor integrated circuit device
JPS61102342A (en) * 1984-10-22 1986-05-21 Hino Motors Ltd Control unit for automatic transmission system control
US5986468A (en) * 1991-03-06 1999-11-16 Quicklogic Corporation Programmable application specific integrated circuit and logic cell therefor
US6078191A (en) * 1991-03-06 2000-06-20 Quicklogic Corporation Programmable application specific integrated circuit and logic cell

Similar Documents

Publication Publication Date Title
JPS56145404A (en) Input circuit of sequence controller
JPS5483341A (en) Digital integrated circuit
EP0355724A3 (en) Two-level ecl multiplexer without emitter dotting
JPS55118247A (en) Adaptive type signal
JPS5637732A (en) Lsi parameter setting system
JPS57138220A (en) Data input equipment for logical circuit
JPS5635202A (en) Multiplex control device
JPS5696350A (en) Memory extension system
JPS6448556A (en) Signal output system
JPS5640338A (en) Line switching circuit
JPS55158736A (en) Automatic switching transmitter for input signal
JPS5323202A (en) Scan system
EP0117357A3 (en) Digital signal composing circuits
JPS55151806A (en) Signal level control circuit
JPS5668978A (en) Address switching system
JPS5798172A (en) Memory access controlling circuit
GB1165584A (en) Circuit Arrangement for the Automatic Balancing of Pre-Set Current Values which can be Varied Arbitrarily.
JPS6490629A (en) Three-dimensional signal mutiplexing circuit
JPS5595446A (en) Back-up system
JPS5637734A (en) Frequency dividing device
JPS5715440A (en) Semiconductor device
JPS5611525A (en) Discrimination system for electric circuit
JPS6415821A (en) 3-state control system
JPS5496313A (en) Signal switching system
JPS55147035A (en) Three phase pulse generating circuit