JPS5637643A - Manufacturing of semiconductor integrated circuit - Google Patents

Manufacturing of semiconductor integrated circuit

Info

Publication number
JPS5637643A
JPS5637643A JP11279079A JP11279079A JPS5637643A JP S5637643 A JPS5637643 A JP S5637643A JP 11279079 A JP11279079 A JP 11279079A JP 11279079 A JP11279079 A JP 11279079A JP S5637643 A JPS5637643 A JP S5637643A
Authority
JP
Japan
Prior art keywords
layer
sio2
si3n4
psg
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11279079A
Other languages
Japanese (ja)
Other versions
JPS6257108B2 (en
Inventor
Koji Kozuka
Hisayuki Higuchi
Masao Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11279079A priority Critical patent/JPS5637643A/en
Publication of JPS5637643A publication Critical patent/JPS5637643A/en
Publication of JPS6257108B2 publication Critical patent/JPS6257108B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To improve the high frequency chracteristic and the integration degree by a method wherein the separation of elements and the positioning for connecting base, emitter and collector can be achieved by only one number of photo masking process, thereby making the base resistance and collector capacity extremely small. CONSTITUTION:SiO2 9 and Si3N4 10 are laid upon a P type Si substrate including an N buried layer 5, a leading out layer 7 and an N epitaxial layer 6. Three layers films 15, 16 each comprising polycrystal Si 11, PSG 12 and Si3N4 13 are selectively formed by a photoengraving method and sputtering. The PSG of the film 16 is removed by etching the side thereof. Then, the polycrystal Si is oxidated to form SiO2 17, 18 and the Si3N4 13, 10, the PSG 12, the SiO2 9 and the N epitaxial layer 6 are etched successively. Thereafter a separation layer 19 is formed by oxidation and a P base 21 and an N<+>emitter 22 are formed by exposing the N layer 6 through a window in the SiO2 film 17. After etching with a mask of the layer 22, a P base leading out layer 23 is formed and Al is evaporated to provide electrodes 24-26. Finally polyimide resin 27 is covered thereon and an Al wiring 28 is applied. This arrangement can provide a bipolar IC with the excellent high frequency characteristic and the high degree of integration.
JP11279079A 1979-09-05 1979-09-05 Manufacturing of semiconductor integrated circuit Granted JPS5637643A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11279079A JPS5637643A (en) 1979-09-05 1979-09-05 Manufacturing of semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11279079A JPS5637643A (en) 1979-09-05 1979-09-05 Manufacturing of semiconductor integrated circuit

Publications (2)

Publication Number Publication Date
JPS5637643A true JPS5637643A (en) 1981-04-11
JPS6257108B2 JPS6257108B2 (en) 1987-11-30

Family

ID=14595574

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11279079A Granted JPS5637643A (en) 1979-09-05 1979-09-05 Manufacturing of semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS5637643A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843572A (en) * 1981-09-09 1983-03-14 Nec Corp Manufacture of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5843572A (en) * 1981-09-09 1983-03-14 Nec Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPS6257108B2 (en) 1987-11-30

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