JPS5630737A - Semiconductor ic circuit - Google Patents
Semiconductor ic circuitInfo
- Publication number
- JPS5630737A JPS5630737A JP10642179A JP10642179A JPS5630737A JP S5630737 A JPS5630737 A JP S5630737A JP 10642179 A JP10642179 A JP 10642179A JP 10642179 A JP10642179 A JP 10642179A JP S5630737 A JPS5630737 A JP S5630737A
- Authority
- JP
- Japan
- Prior art keywords
- element separation
- groove
- oxidized film
- epitaxial
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
- H01L21/7621—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region the recessed region having a shape other than rectangular, e.g. rounded or oblique shape
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Local Oxidation Of Silicon (AREA)
- Element Separation (AREA)
Abstract
PURPOSE:To minimize a distance necessary for an element separation to the limit by a method wherein a groove is formed on the top of an epitaxial-layer and made a wall for the element separation covering with an oxidized film. CONSTITUTION:The U-shape groove is formed at the portion corresponding to the element separation of a substrate 10. When an epitaxial-layer 12 is grown on the substrate, the groove of the epitaxial-layer is made a groove 13 in slightly languish shape. When thermal oxidation is then applied to the surface, an oxidized film 14 is adhered to the surface and at the same time, there is formed a deep walled groove 15 covered with the oxidized film of narrow width and thickness. With the removal of the oxidized film 14 on the surface, the wall 15 is left behind and used for the element separation. If a thickness of the oxidized film is of the order of 3mum, the element separation becomes completely possible without mutual connection of the depletion layers of the diffusing layers 16 and 17. Whereby the distance required for the element separation can be reduced to 1mum without a special technic of lithography, and the degree of integration can be improved in wide range.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10642179A JPS5630737A (en) | 1979-08-21 | 1979-08-21 | Semiconductor ic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10642179A JPS5630737A (en) | 1979-08-21 | 1979-08-21 | Semiconductor ic circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5630737A true JPS5630737A (en) | 1981-03-27 |
JPH0147010B2 JPH0147010B2 (en) | 1989-10-12 |
Family
ID=14433191
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10642179A Granted JPS5630737A (en) | 1979-08-21 | 1979-08-21 | Semiconductor ic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5630737A (en) |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5226182A (en) * | 1975-08-25 | 1977-02-26 | Hitachi Ltd | Manufacturing method of semi-conductor unit |
JPS5260581A (en) * | 1975-11-14 | 1977-05-19 | Agency Of Ind Science & Technol | Semiconductor device |
JPS5456357A (en) * | 1977-10-14 | 1979-05-07 | Hitachi Ltd | Production of semiconductor device |
JPS5457877A (en) * | 1978-08-28 | 1979-05-10 | Hitachi Ltd | Semiconductor device |
JPS5499575U (en) * | 1977-12-26 | 1979-07-13 |
-
1979
- 1979-08-21 JP JP10642179A patent/JPS5630737A/en active Granted
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5226182A (en) * | 1975-08-25 | 1977-02-26 | Hitachi Ltd | Manufacturing method of semi-conductor unit |
JPS5260581A (en) * | 1975-11-14 | 1977-05-19 | Agency Of Ind Science & Technol | Semiconductor device |
JPS5456357A (en) * | 1977-10-14 | 1979-05-07 | Hitachi Ltd | Production of semiconductor device |
JPS5499575U (en) * | 1977-12-26 | 1979-07-13 | ||
JPS5457877A (en) * | 1978-08-28 | 1979-05-10 | Hitachi Ltd | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JPH0147010B2 (en) | 1989-10-12 |
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