JPS56169969A - Synchronisum separation circuit - Google Patents
Synchronisum separation circuitInfo
- Publication number
- JPS56169969A JPS56169969A JP7467280A JP7467280A JPS56169969A JP S56169969 A JPS56169969 A JP S56169969A JP 7467280 A JP7467280 A JP 7467280A JP 7467280 A JP7467280 A JP 7467280A JP S56169969 A JPS56169969 A JP S56169969A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- amplifier
- inputted
- output
- peak
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/08—Separation of synchronising signals from picture signals
Abstract
PURPOSE:To obtain a stable synchronizing signal against level fluctuation, by setting the threshold level of a detecting circuit to the middle point of synchronizing pulses. CONSTITUTION:A TV signal in pedestal clamping inputted to an input terminal 6 is inverted for the phase at an operational amplifier 8 and inputted to a peak detection circuit and a detection circuit. In the peak detection circuit, a peak rectifying taking the synchronizing pulse signal part of the TV signal as the peak value is made. This output is inputted to an operating circuit 9, it is compared with a reference voltage Vs1 and amplified, fed back to an amplifier 8, and an output voltage in which the peak voltage is controlled to a given value is obtained from the amplifier 8. On the other hand, the output signal of an amplifier 9 is inputted also to an operational amplifier 10, and it is compared with a reference voltage Vs2 and amplified. From the amplifier 10, a voltage between the peak value of the synchronizing pulse of the TV signal V0 and the pedestal level is obtained, and it is inputted to a detection circuit 11 as a threshold level. Thus, the signal V0 and the output of the amplifier 10 are given to the circuit 11 to output a stable synchronizing pulse.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7467280A JPS6020952B2 (en) | 1980-06-03 | 1980-06-03 | Synchronous separation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7467280A JPS6020952B2 (en) | 1980-06-03 | 1980-06-03 | Synchronous separation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56169969A true JPS56169969A (en) | 1981-12-26 |
JPS6020952B2 JPS6020952B2 (en) | 1985-05-24 |
Family
ID=13553946
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7467280A Expired JPS6020952B2 (en) | 1980-06-03 | 1980-06-03 | Synchronous separation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6020952B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205378A (en) * | 1982-05-25 | 1983-11-30 | Iwatsu Electric Co Ltd | Synchronizing signal separating circuit |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01130860U (en) * | 1988-03-02 | 1989-09-06 | ||
JPH0388967U (en) * | 1989-12-28 | 1991-09-11 |
-
1980
- 1980-06-03 JP JP7467280A patent/JPS6020952B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205378A (en) * | 1982-05-25 | 1983-11-30 | Iwatsu Electric Co Ltd | Synchronizing signal separating circuit |
JPH0218635B2 (en) * | 1982-05-25 | 1990-04-26 | Iwatsu Electric Co Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6020952B2 (en) | 1985-05-24 |
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