JPS56169970A - Tv signal clamp circuit - Google Patents

Tv signal clamp circuit

Info

Publication number
JPS56169970A
JPS56169970A JP7467380A JP7467380A JPS56169970A JP S56169970 A JPS56169970 A JP S56169970A JP 7467380 A JP7467380 A JP 7467380A JP 7467380 A JP7467380 A JP 7467380A JP S56169970 A JPS56169970 A JP S56169970A
Authority
JP
Japan
Prior art keywords
output
peak
amplifier
signal
detection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP7467380A
Other languages
Japanese (ja)
Other versions
JPH0157553B2 (en
Inventor
Koichi Oota
Susumu Hanaoka
Teruo Kawatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP7467380A priority Critical patent/JPS56169970A/en
Publication of JPS56169970A publication Critical patent/JPS56169970A/en
Publication of JPH0157553B2 publication Critical patent/JPH0157553B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/14—Picture signal circuitry for video frequency region
    • H04N5/16—Circuitry for reinsertion of dc and slowly varying components of signal; Circuitry for preservation of black or white level

Abstract

PURPOSE:To make a device small in the size and light in the weight, by picking up a synchronizing pulse from the output of a TV signal amplifier, making the peak-detection for the pulse, and clamping and feeding back it with the reference voltage. CONSTITUTION:A TV signal inputted to an input terminal is amplified at a TV amplifier 12 and the output is outputted from an output terminal 2. A part of the output is in peak detection at a peak value detection circuit consisting of a diode 14, capacitor 15 and resistor 18, and the detected value is controlled to be a reference voltage Vs17 at a comparator 13. The output of the comparator 13 is negative- fed back to the amplifier 12. As a result, the peak potential of a synchronizing pulse of the TV signal is clamped to a potential of VS-VD (where; VD is a leading voltage of the diode 14). With the constitution like this, the synchronizing circuit is omitted and the small-sized and light-weight device is realized.
JP7467380A 1980-06-03 1980-06-03 Tv signal clamp circuit Granted JPS56169970A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7467380A JPS56169970A (en) 1980-06-03 1980-06-03 Tv signal clamp circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7467380A JPS56169970A (en) 1980-06-03 1980-06-03 Tv signal clamp circuit

Publications (2)

Publication Number Publication Date
JPS56169970A true JPS56169970A (en) 1981-12-26
JPH0157553B2 JPH0157553B2 (en) 1989-12-06

Family

ID=13553973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7467380A Granted JPS56169970A (en) 1980-06-03 1980-06-03 Tv signal clamp circuit

Country Status (1)

Country Link
JP (1) JPS56169970A (en)

Also Published As

Publication number Publication date
JPH0157553B2 (en) 1989-12-06

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