JPS56166551A - Operation control - Google Patents

Operation control

Info

Publication number
JPS56166551A
JPS56166551A JP6884880A JP6884880A JPS56166551A JP S56166551 A JPS56166551 A JP S56166551A JP 6884880 A JP6884880 A JP 6884880A JP 6884880 A JP6884880 A JP 6884880A JP S56166551 A JPS56166551 A JP S56166551A
Authority
JP
Japan
Prior art keywords
data
memory
inputted
address
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6884880A
Other languages
Japanese (ja)
Other versions
JPS6343773B2 (en
Inventor
Kazutoshi Eguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6884880A priority Critical patent/JPS56166551A/en
Publication of JPS56166551A publication Critical patent/JPS56166551A/en
Publication of JPS6343773B2 publication Critical patent/JPS6343773B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Abstract

PURPOSE:To realize optimum control and realize the high-speed processing and shorten the check time, by determining the type of memory access by the data length and two bits from the least significant digit of the address of data in a main memory. CONSTITUTION:The data length is stored in a register RG9 through a data selector DS18, and two bits from the least significant digit of the address of data in a main memory 5 are stored in an RG10 through a DS19. Contents of RG9 and RG10 are inputted to the first memory 11, and here, the type of memory access is determined. The type of memory access is temporarily held in an RG14 and is sent to a control bus 1 through a gate 13. In this case, an inhibition signal is inputted to a gate 8, and a microprogram from a control storage part 7 is not sent out. When a certain addressing is performed, contents of RGs 9 and 10 are inputted to the second memory 12, and here, the numeric data which updates the address to read out the next data from the memory 5 is determined.
JP6884880A 1980-05-26 1980-05-26 Operation control Granted JPS56166551A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6884880A JPS56166551A (en) 1980-05-26 1980-05-26 Operation control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6884880A JPS56166551A (en) 1980-05-26 1980-05-26 Operation control

Publications (2)

Publication Number Publication Date
JPS56166551A true JPS56166551A (en) 1981-12-21
JPS6343773B2 JPS6343773B2 (en) 1988-09-01

Family

ID=13385504

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6884880A Granted JPS56166551A (en) 1980-05-26 1980-05-26 Operation control

Country Status (1)

Country Link
JP (1) JPS56166551A (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59174958A (en) * 1983-03-24 1984-10-03 Ricoh Co Ltd Method for writing data in memory
JPS59188763A (en) * 1983-04-08 1984-10-26 Ricoh Co Ltd Data write method to memory
JPS59191663A (en) * 1983-04-14 1984-10-30 Ricoh Co Ltd Data writing method to memory
JPS59194255A (en) * 1983-04-20 1984-11-05 Ricoh Co Ltd Writing method of data to memory
JPS61221965A (en) * 1985-03-28 1986-10-02 Nec Corp Vector data processor
JPS62256135A (en) * 1986-04-30 1987-11-07 Fujitsu Ltd Processing system for translation test instruction
JPH02100721A (en) * 1988-10-07 1990-04-12 Nec Corp Arithmetic processing unit
JPH05210573A (en) * 1992-01-31 1993-08-20 Fujitsu Ltd Address generating method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59174958A (en) * 1983-03-24 1984-10-03 Ricoh Co Ltd Method for writing data in memory
JPS59188763A (en) * 1983-04-08 1984-10-26 Ricoh Co Ltd Data write method to memory
JPS59191663A (en) * 1983-04-14 1984-10-30 Ricoh Co Ltd Data writing method to memory
JPS59194255A (en) * 1983-04-20 1984-11-05 Ricoh Co Ltd Writing method of data to memory
JPS61221965A (en) * 1985-03-28 1986-10-02 Nec Corp Vector data processor
JPS62256135A (en) * 1986-04-30 1987-11-07 Fujitsu Ltd Processing system for translation test instruction
JPH02100721A (en) * 1988-10-07 1990-04-12 Nec Corp Arithmetic processing unit
JPH05210573A (en) * 1992-01-31 1993-08-20 Fujitsu Ltd Address generating method

Also Published As

Publication number Publication date
JPS6343773B2 (en) 1988-09-01

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