JPS55117780A - Buffer memory unit - Google Patents
Buffer memory unitInfo
- Publication number
- JPS55117780A JPS55117780A JP2528079A JP2528079A JPS55117780A JP S55117780 A JPS55117780 A JP S55117780A JP 2528079 A JP2528079 A JP 2528079A JP 2528079 A JP2528079 A JP 2528079A JP S55117780 A JPS55117780 A JP S55117780A
- Authority
- JP
- Japan
- Prior art keywords
- access
- block
- cash
- giving
- blocks
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Memory System Of A Hierarchy Structure (AREA)
Abstract
PURPOSE: To enable high-speed access by registering new data in a block with the highest eviction priority according to the contents of a LRU memory in case of a cash miss bit, and then by giving the block the lowest eviction priority.
CONSTITUTION: Byte address information from instruction processing part 30 is stored in register 10 of buffer memory 60, and access to address array 11 is attained to input address information and effective bit information of four blocks from array 11 to corresponding comparator circuits 12W15. When any one of four blocks disagrees (cash miss bit), access to main memory unit 50 is started. In a cash access cycle, LRU memory 20 is updated by giving a write control signal and a block where a coincidence is obtained through comparison is given the lowest priority being considered to be accessed most newly.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2528079A JPS55117780A (en) | 1979-03-05 | 1979-03-05 | Buffer memory unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2528079A JPS55117780A (en) | 1979-03-05 | 1979-03-05 | Buffer memory unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55117780A true JPS55117780A (en) | 1980-09-10 |
Family
ID=12161603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2528079A Pending JPS55117780A (en) | 1979-03-05 | 1979-03-05 | Buffer memory unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55117780A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01162956A (en) * | 1987-12-18 | 1989-06-27 | Nec Ic Microcomput Syst Ltd | Sequence storage circuit |
JPH0354372B2 (en) * | 1982-09-22 | 1991-08-20 |
-
1979
- 1979-03-05 JP JP2528079A patent/JPS55117780A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0354372B2 (en) * | 1982-09-22 | 1991-08-20 | ||
JPH01162956A (en) * | 1987-12-18 | 1989-06-27 | Nec Ic Microcomput Syst Ltd | Sequence storage circuit |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4493026A (en) | Set associative sector cache | |
US4504902A (en) | Cache arrangement for direct memory access block transfer | |
US6356990B1 (en) | Set-associative cache memory having a built-in set prediction array | |
JPS54128634A (en) | Cash memory control system | |
JPS5687282A (en) | Data processor | |
IE802026L (en) | Data processing system | |
CA1083727A (en) | Address converter in a data processing apparatus | |
JPS5680872A (en) | Buffer memory control system | |
JPH0727492B2 (en) | Buffer storage | |
JPS55117780A (en) | Buffer memory unit | |
JPS5654558A (en) | Write control system for main memory unit | |
US5510973A (en) | Buffer storage control system | |
JPS55108027A (en) | Processor system | |
KR920005296B1 (en) | Information processing device | |
JPS6073760A (en) | Resident system of buffer storage | |
JPS6027967A (en) | Block transfer control system of buffer storage device | |
JPS5687153A (en) | Controller for auxiliary memory | |
JPS5663652A (en) | Information processing unit | |
JPS57172582A (en) | Cash memory control method | |
JPS55119745A (en) | Information processing unit | |
JPS5577072A (en) | Buffer memory control system | |
JPS553038A (en) | Microprogram control unit | |
JPS5593580A (en) | Buffer memory control system | |
JPS5448128A (en) | Buffer memory unit | |
JPS55112661A (en) | Memory control unit |