JPS5615061A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS5615061A JPS5615061A JP9133879A JP9133879A JPS5615061A JP S5615061 A JPS5615061 A JP S5615061A JP 9133879 A JP9133879 A JP 9133879A JP 9133879 A JP9133879 A JP 9133879A JP S5615061 A JPS5615061 A JP S5615061A
- Authority
- JP
- Japan
- Prior art keywords
- light
- memory cell
- film
- leakage current
- semiconductor memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/265—Contactless testing
- G01R31/2656—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
Abstract
PURPOSE:To accurately execute the measurement of the properties of the semiconductor memory in a wafer state by forming an opaque film against a light on the upper surface of a memory cell area to prevent leakage current due to light. CONSTITUTION:An insulating oxide film 6 is selectively formed on the surface of a P-type silicon substrate 5 to selectively form an N-type region forming a memory cell, MOS-FET or the like. After suitably connecting elements therebetween, a surface protective film 8 is formed to protect the surface thereof and insulated the elements therebetween. An opaque thin film layer 7 is selectively formed on the portion located at the region including at least memory cell portion on the film 8. In this manner, it cat shield a light irradiated externally and prevent the increase in the leakage current of a P-N junction due to light.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9133879A JPS5615061A (en) | 1979-07-18 | 1979-07-18 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9133879A JPS5615061A (en) | 1979-07-18 | 1979-07-18 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5615061A true JPS5615061A (en) | 1981-02-13 |
Family
ID=14023633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9133879A Pending JPS5615061A (en) | 1979-07-18 | 1979-07-18 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5615061A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61283160A (en) * | 1985-06-10 | 1986-12-13 | Mitsubishi Electric Corp | Semiconductor memory device |
US5034786A (en) * | 1986-08-29 | 1991-07-23 | Waferscale Integration, Inc. | Opaque cover for preventing erasure of an EPROM |
-
1979
- 1979-07-18 JP JP9133879A patent/JPS5615061A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61283160A (en) * | 1985-06-10 | 1986-12-13 | Mitsubishi Electric Corp | Semiconductor memory device |
US5034786A (en) * | 1986-08-29 | 1991-07-23 | Waferscale Integration, Inc. | Opaque cover for preventing erasure of an EPROM |
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