JPS61283160A - Semiconductor memory device - Google Patents

Abstract

PURPOSE:To effectively and preferably prevent the sensitivity of a sense amplifier from deteriorating by forming a buffer layer for removing the remaining stress at resin sealing time through an insulating film on the top of each conductive layer for forming a set of MOS transistors. CONSTITUTION:A buffer layer 14 due to aluminum wiring layer is formed, for example, similarly to conductive layers 10, 10 to remove the remaining stress at resin sealing time through an insulting film 11a on the tops of the layers 10, 10 for forming a set of MOS transistors 1, 2 as flip-flop sense amplifiers. Accordingly, the transistors 1, 2 sides which are directly readily affected by the influence of molding pressure stress at resin seating time are protected by a buffer layer 14. The remaining molding stress load can be rapidly alleviated by the presence of the layer 14.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor memory device, and more particularly to an improvement in a sense amplifier structure in a resin-sealed semiconductor memory device.

[Conventional technology]

FIG. 2 is an example of a general semiconductor memory circuit of this type. In the circuit configuration shown in FIG. 2, numerals l and 2 are a pair of MOS transistors constituting a flip-flop sense amplifier, 3 and 4 are a pair of adjacent bit lines extending in parallel, 5 is a memory cell, 8 is a dummy cell.

Further, the cross-sectional structure of the conventional device taken along the line AB in the circuit of FIG. 2, that is, the cross-sectional structure of the sense amplifier section is shown in 3rd rIli. Namely.

In FIG. 3, reference numeral 7 denotes a semiconductor substrate, 8.8 each active region selectively diffused on the semiconductor substrate 1, and 8 an insulating thin film interposed between each active region 8.8. Gate made of polysilicon layer etc. formed by
0.10 is a conductive layer such as an aluminum wiring layer connected to each active region 8, and 11 is an insulating film between these layers, thereby forming at least one set of MOS transistors as the flip-flop sense amplifier. ,2
12 is a passivation film formed on the upper layer of this MOS transistor 1.2, and 13 is a molding resin layer for sealing the entirety with resin.

[Problem that the invention seeks to solve]

However, in the case of the structure of the sense amplifier section in the conventional device, a large residual mold stress is applied to the surface of the semiconductor chip due to the resin encapsulation, and this residual stress causes the chip to deteriorate. Each MO9 formed on
) The characteristics of the transistor change, resulting in unbalance in the flip-flop and deterioration of the sensitivity of the sense amplifier. When sealing the entire structure with resin, it was necessary to relieve the mold residual stress at the time of resin sealing by some means.

Therefore, it is an object of the present invention to provide a semiconductor memory device having an unfamiliar sense amplifier structure that causes sensitivity deterioration due to mold residual stress accompanying resin sealing.

[Means for solving problems]

In order to achieve the above object, a semiconductor memory device according to the present invention includes resin sealing via an insulating film on top of each conductive layer constituting at least one set of OS transistors as a flip-flop sense amplifier. A buffer layer is formed to remove residual stress when stopped.

[For production]

That is, in the present invention, the presence of the buffer layer relieves the mold residual stress load during resin sealing, and prevents sensitivity deterioration of the sense amplifier.

〔Example〕

Hereinafter, one embodiment of a semiconductor memory device according to the present invention will be described in detail with reference to FIG.

FIG. 1 is a sectional view showing an outline of a sense amplifier structure in a semiconductor memory device to which this embodiment is applied, corresponding to the conventional structure shown in FIG. 3. In each of these figures, the same reference numerals indicate the same or corresponding parts, and in the structure of this embodiment, each conductive layer constituting a set of MOS transistors 1.2 as the flip-flop sense amplifier 10.10, for example, each conductive layer 9 for removing residual stress during resin sealing via an insulating film +1a.
Similarly to No. 0, a buffer layer 14 made of an aluminum wiring layer or the like is formed.

Therefore, the buffer layer 14 protects each MO9) range metal 1.2 side, which is easily affected by mold pressure stress during resin sealing, and the presence of this buffer layer 14 reduces the mold residual stress load. This can be alleviated as much as possible.

In addition, by using a metal layer made of aluminum wiring as the buffer layer 14, the effect of alleviating the residual stress load is more effectively achieved. This can be easily obtained by repeating the process of forming conductive layer 10.10 again. In addition,
Of course, materials other than aluminum wiring may be used for this buffer layer as long as they can alleviate the residual stress load.

〔Effect of the invention〕

As described in detail above, according to the present invention, there is no residual material on the top of each conductive layer constituting at least one set of MOS transistors as a flip-flop sense amplifier, which remains during resin sealing via an insulating film. Since a buffer layer for stress relief is formed, the presence of this buffer layer makes it possible to alleviate as much as possible the mold residual stress load when the entire element is sealed with resin, and as a result, the sense amplifier It is possible to effectively and favorably prevent the deterioration of the sensitivity of the device, thereby significantly improving the reliability of the device, and its structure is also relatively simple and can be easily implemented.

[Brief explanation of drawings]

FIG. 1 is a vertical cross-sectional view showing the general configuration of a sense amplifier section to which an embodiment of the semiconductor memory device according to the present invention is applied, and FIG. 2 is a circuit configuration of a general resin-sealed semiconductor memory device. No. 311 is a vertical sectional view showing a schematic configuration of a sense amplifier section according to a conventional example of the same device. 7... Semiconductor substrate, 8... Active region, 9...
- Gate, 10... Conductive layer, 11. Ila...
Insulation II! , 13... mold resin layer, 14...
・／Hetufa layer. Agent Masuo Oiwa Figure 1 14 Niva 77 Anno 4 Procedural amendment band (spontaneous) 2. Name of invention semiconductor storage device 3. Representative Moriya Shiki 6. Contents of amendment (1) Specification 3 In line 8 of page 8, after ``The characteristics of...'', add ``Because of the piezoresistance effect, etc.''. (2) On page 5, line 18 of the same book, add ``a layer of material with low hardness, such as aluminum'' after ``the material.''that's all

Claims (2)

[Claims] (1) It has at least one set of MOS transistors consisting of a semiconductor substrate, each active region on the semiconductor substrate, an upper gate between each active region, each conductive layer connected to each active region, etc., and these are resin-sealed. 1. A semiconductor memory device, in which a sense amplifier is configured with a semiconductor memory device, and a buffer layer for removing residual stress during resin sealing is formed on top of each of the conductive layers via an insulating film. (2) The semiconductor memory device according to claim 1, wherein the buffer layer is an aluminum wiring layer.