JPS56143591A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS56143591A
JPS56143591A JP4625080A JP4625080A JPS56143591A JP S56143591 A JPS56143591 A JP S56143591A JP 4625080 A JP4625080 A JP 4625080A JP 4625080 A JP4625080 A JP 4625080A JP S56143591 A JPS56143591 A JP S56143591A
Authority
JP
Japan
Prior art keywords
held
channel
signal
power source
cut
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4625080A
Other languages
Japanese (ja)
Other versions
JPS6019595B2 (en
Inventor
Yutaka Kumagai
Yukio Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP55046250A priority Critical patent/JPS6019595B2/en
Publication of JPS56143591A publication Critical patent/JPS56143591A/en
Publication of JPS6019595B2 publication Critical patent/JPS6019595B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels

Abstract

PURPOSE:To reduce the power consumption by generating a control signal according to the logic between a binary signal showing fluctuations of the power source voltage and a memory selection signal and then by controlling so that the power source current will be minimized. CONSTITUTION:When the memory is held in information holding mode, namely, when power source voltage V1 is held at the low voltage level, transistor(TR) Q39 is cut off and control voltage V2 is held at the high level. Then, p channel TR Q37 of signal input circuit 12 is cut off and n channel TR Q38 is conducting, holding control signal phic is held at the low level. Therefore, p channel TR Q33 in signal input circuit 11 is turned on and n channel TR Q34 is turned off, so that output point P32 will be held at the high level regardless of input signal level A. At this time, since Q34 and Q37 are cut off, power source current I does not flow through the signal input circuit 11 plus 12 and the power consumption is minimized.
JP55046250A 1980-04-10 1980-04-10 semiconductor memory device Expired JPS6019595B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55046250A JPS6019595B2 (en) 1980-04-10 1980-04-10 semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55046250A JPS6019595B2 (en) 1980-04-10 1980-04-10 semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS56143591A true JPS56143591A (en) 1981-11-09
JPS6019595B2 JPS6019595B2 (en) 1985-05-16

Family

ID=12741908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55046250A Expired JPS6019595B2 (en) 1980-04-10 1980-04-10 semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS6019595B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57147190A (en) * 1981-03-05 1982-09-10 Nec Corp Memory circuit
JPS598366A (en) * 1982-07-06 1984-01-17 Toshiba Corp Semiconductor memory
JPS62288915A (en) * 1986-06-09 1987-12-15 Nec Corp Semiconductor integrated circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524093A (en) * 1975-06-30 1977-01-12 Fuji Electric Co Ltd Voltage non-linearity resistance porcelain
JPS5314241A (en) * 1976-07-23 1978-02-08 Hitachi Ltd Semiconductor ignition means

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS524093A (en) * 1975-06-30 1977-01-12 Fuji Electric Co Ltd Voltage non-linearity resistance porcelain
JPS5314241A (en) * 1976-07-23 1978-02-08 Hitachi Ltd Semiconductor ignition means

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57147190A (en) * 1981-03-05 1982-09-10 Nec Corp Memory circuit
JPS6160513B2 (en) * 1981-03-05 1986-12-20 Nippon Electric Co
JPS598366A (en) * 1982-07-06 1984-01-17 Toshiba Corp Semiconductor memory
JPH041436B2 (en) * 1982-07-06 1992-01-13 Tokyo Shibaura Electric Co
JPS62288915A (en) * 1986-06-09 1987-12-15 Nec Corp Semiconductor integrated circuit

Also Published As

Publication number Publication date
JPS6019595B2 (en) 1985-05-16

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