JPS56140460A - Picture processing device - Google Patents
Picture processing deviceInfo
- Publication number
- JPS56140460A JPS56140460A JP4264280A JP4264280A JPS56140460A JP S56140460 A JPS56140460 A JP S56140460A JP 4264280 A JP4264280 A JP 4264280A JP 4264280 A JP4264280 A JP 4264280A JP S56140460 A JPS56140460 A JP S56140460A
- Authority
- JP
- Japan
- Prior art keywords
- given
- data
- memory
- picture
- control part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T1/00—General purpose image data processing
- G06T1/0007—Image acquisition
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Processing Or Creating Images (AREA)
- Image Processing (AREA)
- Digital Computer Display Output (AREA)
Abstract
PURPOSE:To make continuous processings of pictures high-speed to perform operations between pictures flexibly in a high speed, by connecting plural picture memories to an arithmetic logical operation circuit organically and by controlling the logic of the picture processing operation by a microprogram. CONSTITUTION:In case of data write, when microprogram control part 2 gives frame selection signal (h) to output frame selecting circuit 12, resulted operation data is given to selected picture memory 3 and is written and stored by address signal (d). In case of data read from memory 3, input frame selecting circuit 13 selects picture memory 3 by data given from microprogram control part 2, and the neighborhood of the picture element read out from memory 3 is operated according to a designated logic. The output of this operation is given to arithmetic logical operation circuit 14 as input signal (i), and the operation is performed, and operation result data (k) is given to microprogram control part 2 and is transferred to the host computer if required.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4264280A JPS56140460A (en) | 1980-03-31 | 1980-03-31 | Picture processing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4264280A JPS56140460A (en) | 1980-03-31 | 1980-03-31 | Picture processing device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56140460A true JPS56140460A (en) | 1981-11-02 |
Family
ID=12641662
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4264280A Pending JPS56140460A (en) | 1980-03-31 | 1980-03-31 | Picture processing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56140460A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0114203A2 (en) * | 1982-10-29 | 1984-08-01 | Kabushiki Kaisha Toshiba | An image processor |
JPS60104944U (en) * | 1983-12-21 | 1985-07-17 | 横河電機株式会社 | Image data processing device |
JPS60159973A (en) * | 1984-01-31 | 1985-08-21 | Toshiba Corp | Picture processing device |
-
1980
- 1980-03-31 JP JP4264280A patent/JPS56140460A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0114203A2 (en) * | 1982-10-29 | 1984-08-01 | Kabushiki Kaisha Toshiba | An image processor |
JPS60104944U (en) * | 1983-12-21 | 1985-07-17 | 横河電機株式会社 | Image data processing device |
JPS60159973A (en) * | 1984-01-31 | 1985-08-21 | Toshiba Corp | Picture processing device |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS56140460A (en) | Picture processing device | |
US4627035A (en) | Switching circuit for memory devices | |
JPS5447438A (en) | Control system for scratch memory | |
JPS5748137A (en) | Data processor | |
US4694419A (en) | Programmable controller with direct to plant addressing | |
JPS60262253A (en) | Memory data processing circuit | |
KR0153537B1 (en) | Signal processing structure preselecting memory address data | |
JPS5787288A (en) | Video signal processing device | |
JPS59111533A (en) | Digital data arithmetic circuit | |
US5151980A (en) | Buffer control circuit for data processor | |
GB992204A (en) | Memory apparatus | |
JPS55138132A (en) | Signal processor | |
JPS55153053A (en) | Information processor | |
KR950009237B1 (en) | Method of data processing of synchronous semiconductor memory device | |
JPS57200985A (en) | Buffer memory device | |
KR910005381B1 (en) | Method and apparatus for ragion distinction of virtual memory | |
KR950005823Y1 (en) | Multi-language display unit on ibm pc | |
JPS569826A (en) | Channel controller | |
JPS58116579A (en) | Graphic japanese character dot pattern output control system | |
JPS57132229A (en) | Direct memory access controller | |
JPS5954091A (en) | Electronic computer | |
JPS6415844A (en) | Memory device | |
JPS5622170A (en) | Vector operation processing system | |
JPS6045450B2 (en) | interface circuit | |
JPS6450671A (en) | Picture file device |