JPS5954091A - Electronic computer - Google Patents

Abstract

PURPOSE:To reduce the processing time and to realize the effective use of a processor, by connecting the processor to an asynchronous memory continuous region shift device. CONSTITUTION:The control parts 3 and 1 of a memory continuous region shift device 3 work in response to a continuous region shift command given from a processor 1. Thus the read-out of contents of a shift originator region 5 of a memory 2 is controlled together with the writing to a shift destination region 6, the zero writing to the region 5, etc. These controls are carried out asynchronously with the processor 1 until the count value of a shift remaining cell number holding register 3.4 is set at zero while referring to the contents of a shift originator address holding register 3.2, a shift destination address holding register 3.3, a shift residual number holding register 3.4 and a zero clear need/ no-need information holding register 3.5 of the area 5, in the device 3 to which the control information 4 is set for the device 3 of the memory 2. This independent processing reduces the processing time and ensures the effective use of the processor with a load reduction.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an electronic computer suitable for processing multilingual data at high frequency, such as image processing and kanji processing.

[Background technology and its problems] When using a computer for the purpose of image processing or kanji processing, movement to consecutive areas in memory deals with data and occurs frequently, so it is necessary to shorten the overall processing time. From this point of view, high speed and effective use of processing equipment is desired.

Furthermore, when moving continuous areas in the memory, there are many cases where the destination is zero-cleared after the movement and the next process is performed, and the above-mentioned target also includes zero-clearing the destination after the movement.

Conventionally, movement to consecutive areas in memory has been realized by the following method.

(1) Using the basic commands of an electronic calculator, the program is written as software that repeats the operation of reading the source content of the memory and filling it into the destination as many times as necessary.

(2) Use command words for moving data between memories in electronic computer command words.

However, the above method has the following problems because it is repeated many times for a large amount of data in image processing and kanji processing, in addition to normal data processing.

In other words, regarding (1), (a) processing time is long because the operation is performed by software.

(b) This operation requires many execution cycles of the processing device.

(c) If the source of the movement is cleared to zero after the memory is moved, the execution cycles of the processing device will further increase.

(d) The processing unit is used for memory movement and cannot be used for processing.

Regarding (2), (a) Since the operation is performed by firmware, it is faster than (1), but it takes time to process a large amount of data.

(b) This operation requires many execution cycles of the processing device.

(c) If the source of the movement is cleared to zero after the memory is moved, the execution cycles of the processing device will further increase.

(d) It cannot be used for processing in which the processing unit is used for memory movement.

[Object of the Invention] The present invention has been made based on the above-mentioned circumstances, and its object is to provide a continuous memory area moving device, which is a dedicated device that operates asynchronously with a processing device, in an electronic control machine. By doing so, we provide an electronic computer that can perform the process of moving continuous areas in memory and further clearing the source of the move to zero if necessary, at high speed, and also allows the processing device to be used for other processes during this time. It's about doing.

[Summary of the Invention] That is, the electronic computer of the present invention includes a control unit, a source address holding register, a destination address holding register, a movement remaining cell number holding register, and a zero clearing/requirement of a movement source area.
A continuous memory area moving device configured of unnecessary information holding registers is provided, the continuous memory area moving device operates asynchronously with the processing device in response to a command from the processing device, and the control unit is designated by the command. According to the control information for the memory continuous area moving device consisting of a plurality of consecutive cells in the memory, zero-clearing required/unnecessary information of the source address holding register, destination address holding register, remaining number of moving cells holding register, and source area is performed. After the value of the holding register is initialized and the control unit moves the contents of the cell in the memory indicated by the source address holding register to the cell in the memory indicated by the destination address holding register, a zero clearing request for the source area is performed. /Only when the unnecessary information holding register indicates that zero clearing is required, the movement source cell is cleared to zero, the contents of the movement source address holding register and the movement destination address holding register are added for one cell, and the movement remaining cell number holding register is cleared. The operation of decrementing the contents by one cell is repeated until the contents of the remaining moving cell number holding register become O.
The present invention is characterized in that the control unit has a function of issuing an interrupt to the processing device indicating the completion of the operation of the memory continuous area moving device when the memory cell transfer device reaches the state where the continuous memory area moving device has completed the operation.

[Embodiment of the Invention] FIG. 1 is a block diagram of an electronic computer according to an embodiment of the present invention.

In the figure, 1 is a processing device, 2 is a memory, and 3 is a memory continuous area moving device.

The memory continuous area moving device 3 includes a control unit 3.1, a source address holding register 3.2, a destination address holding register 3.3, a movement remaining cell number holding register 3.4, and whether or not zero-clearing of the source area is necessary. It consists of information holding registers 3.5.

4 is control information for the memory continuous area moving device and exists in the memory 2.

The control information 4 for the continuous memory area moving device includes the source start address 4.1, the destination start address 4.2, the number of cells to be moved 4.3, and information on whether or not zero clearing of the source area is necessary.
It consists of 4.

Reference numeral 5 indicates a movement source area, which exists in the memory 2.

5, L 5.2,...5,11...5. n is a cell in the movement source area.

Reference numeral 6 indicates a destination area, which exists within the memory 2.

6.1.6.2,...6.11...6. n is a cell within the destination area.

The operation of the electronic computer of the present invention will be explained below.

(1) When the processing device 1 detects an instruction in the program that uses the memory continuous area moving device 3, it outputs a predetermined command to the memory continuous area moving device 3.

At this time, the program transfers the control information 4 to the memory continuous area moving device 3 in advance, with a source start address 4.1, a destination start address 4.2, and a number of cells to be moved 4.3.
, it is assumed that predetermined data is set for the zero clear required/unnecessary information 4.4 of the movement source area.

(2) The control unit 3゜1 in the memory continuous area moving device 3:
The starting address of the control information 4 to the memory continuous area moving device 3 specified in response to the command from the processing device 1 is determined. The control unit 3.1 then performs the following processing.

(a) Read the source start address 4.1 and write it to the source address holding register 3.2.

(a) Read the destination start address 4.2 and write it to the destination address holding register 3.3.

(1) Read the number of moving cells, 4.3, and write it into the moving remaining cell number holding register 3.4.

(,1) Read the zero clear required/unnecessary information 4.4 of the source area and write it to the zero clear required/unnecessary information holding register 3.5 of the source area.

As a result, the source address holding register 3.2 contains the address of cell 5.1, which is the first cell in the source area 5, and the destination address holding register 3.3 contains the address of the cell 5.1 in the destination area 6.
The address of cell 6.1, which is the first cell of , is entered.

Further, n, which is the number of moving cells, is entered in the moving remaining cell number holding register 3.4.

(3) The control unit 3.1 controls the movement source address holding register 3
．． 2, reads the contents of cell 5.1 in source area 5 and moves to destination area 6 indicated by destination address holding register 3.3.
Write this content into cell 6.1.

Next, the control unit 3.1 controls the movement source area 5 indicated by the movement source address holding register 3.2 only when the contents of the movement source area zero clearing required/unnecessary information holding register 3.5 indicates that zero clearing is required. Write zero in cell 5°1.

The control unit 3.1 then controls the destination address holding register 3.
．． 2. Add one cell to the contents of the destination address holding register 3゜3 and add the remaining number of moving cells holding register 3.
．． Decrease the contents of 4 by one cell.

As a result, the contents of the source address holding register 3.2 indicate the cell 5.2 of the source area 5. The contents of the destination address holding register 3.3 are the cell 6 of the destination area 6.
．． 2 is shown.

Further, the moving remaining cell number holding register 3.4 indicates n-1.

(4) In this way, the control unit 3.1 repeats the following process until the contents of the moving remaining cell number holding register 3.4 become zero.

That is, the contents of cell 5.1 in the source area 5 indicated by the source Atnos holding register 3.2 are read, and the contents of cell 5.1 in the destination area 6 indicated by the destination address holding register 3.3 are read.
Write this content in.

Next, the control unit 3.1 requires zero clearing of the movement source area/needs zero clearing of the unnecessary movement source area/unnecessary information holding register 3.5
Cell 5. of the source area 5 indicated by the source address holding register 3.2 only when the contents of cell 5. indicate that zero clearing is required.
Write zero to i.

The control unit 3.1 then controls the source address holding register 3.1.
2. Add one cell to the contents of the destination address holding register 3.3, and add the remaining number of moving cells holding register 3.
Decrease the contents of 4 by one cell.

(5) The control unit 3.1 is a moving remaining cell number holding register 3.4
When it is detected that the contents of
An interrupt is generated to inform the processing device 1 that the processing in the continuous memory area moving device 3 has been completed.

During the period from (1) to (5) above, the continuous memory area moving device 3 operates asynchronously with the processing device 1, so the processing device 1 can execute other processing during this period.

By the way, in the embodiment shown in FIG. 1, when executing movement to a plurality of continuous memory areas, the processing device needs to output multiple commands to the memory continuous area movement device. The figure shows that the processing device only outputs a single command to the memory continuous area moving device.
1 shows an embodiment of the present invention in which a memory continuous area moving device has a function of collectively executing movement of a plurality of non-contiguous memory continuous areas.

The electronic computer of this embodiment operates as follows.

(1) When the processing device 1 detects an instruction in the program that uses the memory continuous area moving device 3, it outputs a predetermined command to the memory continuous area moving device 3.

At this time, the program sends control information 4. to the memory continuous area moving device in the memory 2 in advance. A14, B1...
..., /1. It is assumed that predetermined data is set for N. Note that the control information 4°A, 4. b,・
..., 4. N also consists of a source head address, a destination head address, the number of cells to be moved, and zero clearing required/unnecessary information for the source area.

(2) The control unit 3゜1 in the memory continuous area moving device 3:
A control unit 4 for a memory continuous area moving device instructed in response to a command from the processing device 1. Determine the starting address of A.

Then, based on the contents sent to the control unit 4 for the memory continuous area moving device, the source address holding register 3.2, the destination address holding register 3.3, the remaining number of moving cells holding register 3.4, Initialize the zero-clear required/unnecessary information holding register 3.5.

(3) The control unit 3.1 reads the contents of the cell indicated by the source address holding register 1 register 3.2 and writes the contents to the cell indicated by the destination address holding register 3.3, and then
Zero-clear required/unnecessary information holding register for movement source area 3.
Only when the contents of 5 indicate that zero clearing is required, write zero to the size indication cell of the source address holding register 3.2, and write zero to the contents of the source address holding register 3.2 and destination address holding register 3.3. The operation of adding one cell by one cell and decrementing the contents of the moving remaining cell number holding register 3.4 by one cell is repeated until the contents of the moving remaining cell number holding register become zero.

As a result, the movement source area 5. The contents of cell A are moved to destination area 6
．． It is moved to cell A.

(/I) Next, the control unit 3.1 sends control information /1.1 to the memory continuous area moving device. Presence or absence of linkage information for plurality processing within A4. The contents of A and 5 are checked, and if there is linkage information, the process moves on to the next process, and if there is no linkage information, the processing is completed and an interrupt is issued to the processing device.

Here, the presence/absence of connection information for plurality processing 4.A, 5 indicates that connection information is present, and the start address 4.A of the next control information. A, 6 indicates the start address of the control information 4.8 to the memory continuous area moving device.

(5) Therefore, the control unit 3.1 controls the movement source area 5.8 based on the control information 4.8 to the memory continuous area movement device.
Move the contents of the cell to the cell in the destination area 6.8. (6)
In this way, the control unit 3.1 controls the source area 5.1 based on the control information 4°N for the continuous memory area movement device.
Move the cell contents of N to the destination area 6. The operation is repeated until the cell is moved to N cell.

(7) In this way, move source area 5. Move the cell contents of N to the destination area 6. When the transfer to cell N is completed, an interrupt is sent to the processing device 1, and the processing device f? Let 71 know.

During the period from (1) to (7) above, the memory continuous area moving device 3 operates asynchronously with the processing device 1, so during this period the processing device 1 is moved to another process I! P can be executed.

FIG. 3 shows a plurality of memory continuous area moving devices 3. which operate in the same way as the memory continuous area moving device described in FIG. A
, 3. B......3. This shows another embodiment of the present invention in which the memory contiguous area moving device 3.N is connected in response to a command from the processing device 1. A.3. B,・
..., 3. By operating N in parallel, processing time for wide range movement on memory is shortened.

In this embodiment, memory contiguous area movement bag @3. A
, 3. B...3. N is control information for each memory continuous area moving device 4. A, 4. B1...
, 4N, the source area 5. Move from A to destination area 6. A, from the source area 5.8 to the destination area 6.8,
Move source area 5. Destination area from N6. Move to N respectively.

During this time, the memory continuous area moving device 3. A, 3゜81...
..., 3. N operates independently of the processing device 1;
Also, each memory continuous area moving device 3. A, 3°81...
..., 3. N operates independently.

Note that this embodiment is an example in which a plurality of memory continuous area moving devices that operate in the same manner as the memory continuous area moving device explained in FIG. 1 is connected, but the memory continuous area moving device explained in FIG. It is also possible to configure a configuration in which a plurality of memory continuous area moving devices that perform the same operation as described above are connected.

[Effects of the Invention] As explained above, the present invention is configured such that the process of moving continuous areas in the memory is performed by a memory continuous area moving device that operates independently and asynchronously from the processing device. This has the effect of shortening processing time and making effective use of processing equipment.

[Brief explanation of drawings]

1 to 3 are configuration diagrams showing embodiments of the present invention, respectively. 1...... Processing device 2... Memory 3... Memory continuous area moving device 3
．． 1...Control unit 3.2...Movement source address holding register 3.3
...Movement address holding register 3.4...
...Movement remaining cell number holding register 3.5...
Movement source area zero clear required/unnecessary information holding register 4... Information for controlling the memory continuous area movement device 4.1... Movement source start address 4.2・・・・・・
・・Destination start address 4.3 ・・Number of cells to be moved 4.4 ・・・Move source area zero clear required/unnecessary information 5 ・・・・・Move Original area 5.1.5゜2
．． 5. i, 5. n...Cell 6...
...Move destination area 6.1.6.2.6. i, 6,
n・・・・・・Sell agent patent attorney Suyama Sa −

Claims (1)

[Claims] The continuous memory area movement device is equipped with a memory continuous area moving device consisting of a control unit, a movement source address holding register, a movement destination address holding register, a movement remaining cell number holding register, and a movement source area zero clear required/unnecessary information holding register. The device operates asynchronously with the processing device in response to a command from the processing device, and the control unit operates according to control information for a memory continuous area moving device consisting of a plurality of continuous cells in the memory specified by the command, The movement source address holding register, movement destination address holding register, movement remaining cell number holding register, and movement source area need to be cleared to zero.
After initializing the value of the unnecessary information holding register and moving the contents of the cell in the memory indicated by the source address holding register to the cell in the memory indicated by the destination address holding register, the controller transfers the contents of the cell in the memory indicated by the destination address holding register. Only when the zero-clear required/unnecessary information holding register indicates that zero-clearing is required, the source cell is zero-cleared, the contents of the source address holding register and the destination address holding register are added for one cell, and the number of remaining cells to be moved is The operation of decrementing the content of the holding register by one cell is repeated until the content of the moving remaining cell number holding register becomes O, and when the content of the moving remaining cell number holding register becomes O, the control unit causes the processing unit to 1. An electronic computer having a function of generating an interrupt indicating completion of operation of the memory continuous area moving device.