JPH0447350A - Main storage read/response control - Google Patents

Main storage read/response control

Info

Publication number
JPH0447350A
JPH0447350A JP2153754A JP15375490A JPH0447350A JP H0447350 A JPH0447350 A JP H0447350A JP 2153754 A JP2153754 A JP 2153754A JP 15375490 A JP15375490 A JP 15375490A JP H0447350 A JPH0447350 A JP H0447350A
Authority
JP
Japan
Prior art keywords
block
desired data
settled
block transfer
transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2153754A
Other languages
Japanese (ja)
Inventor
Yuichi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Ibaraki Ltd
Original Assignee
NEC Ibaraki Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Ibaraki Ltd filed Critical NEC Ibaraki Ltd
Priority to JP2153754A priority Critical patent/JPH0447350A/en
Publication of JPH0447350A publication Critical patent/JPH0447350A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To read out desired data from a block buffer without waiting for the end of block transfer by detecting whether desired data is settled in the block buffer or not.
CONSTITUTION: An intra-block pointer part included in a memory access address 11 is compared with a block transfer state value 18 as the output of a block transfer counter 36 by a block buffer pointer comparator 39 to check whether desired data is settled in the block buffer or not. When it is settled, a data response timing signal 24 is sent to a response control circuit 34 from the block buffer pointer comparator 39, and the response control circuit 34 sends a response signal 14 even in the middle of block transfer when the main storage read address generated during the block transfer is included in a block transfer address 17 and desired data is settled in a block buffer 44. Thus, desired data can be read out before the end of block transfer.
COPYRIGHT: (C)1992,JPO&Japio
JP2153754A 1990-06-12 1990-06-12 Main storage read/response control Pending JPH0447350A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2153754A JPH0447350A (en) 1990-06-12 1990-06-12 Main storage read/response control

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2153754A JPH0447350A (en) 1990-06-12 1990-06-12 Main storage read/response control

Publications (1)

Publication Number Publication Date
JPH0447350A true JPH0447350A (en) 1992-02-17

Family

ID=15569396

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2153754A Pending JPH0447350A (en) 1990-06-12 1990-06-12 Main storage read/response control

Country Status (1)

Country Link
JP (1) JPH0447350A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06168274A (en) * 1993-06-25 1994-06-14 Matsushita Electric Ind Co Ltd Information retrieving device
US6154814A (en) * 1997-06-16 2000-11-28 Nec Corporation Cache device that reduces waiting time necessary for a given subsequent request to gain access to the cache
JP2007172609A (en) * 2005-12-22 2007-07-05 Internatl Business Mach Corp <Ibm> Efficient and flexible memory copy operation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06168274A (en) * 1993-06-25 1994-06-14 Matsushita Electric Ind Co Ltd Information retrieving device
US6154814A (en) * 1997-06-16 2000-11-28 Nec Corporation Cache device that reduces waiting time necessary for a given subsequent request to gain access to the cache
JP2007172609A (en) * 2005-12-22 2007-07-05 Internatl Business Mach Corp <Ibm> Efficient and flexible memory copy operation

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