JPS56131948A - Manufacture of semiconductor element - Google Patents

Manufacture of semiconductor element

Info

Publication number
JPS56131948A
JPS56131948A JP3398880A JP3398880A JPS56131948A JP S56131948 A JPS56131948 A JP S56131948A JP 3398880 A JP3398880 A JP 3398880A JP 3398880 A JP3398880 A JP 3398880A JP S56131948 A JPS56131948 A JP S56131948A
Authority
JP
Japan
Prior art keywords
bpsg
sio2
opening
film
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3398880A
Other languages
Japanese (ja)
Inventor
Yoshinori Yamamoto
Takao Aoki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP3398880A priority Critical patent/JPS56131948A/en
Publication of JPS56131948A publication Critical patent/JPS56131948A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To shorten the forming process of an electrode window, by a method wherein the window is made to SiO2 on Si substrate, covered with BPSG film, and then the window is opened again, the surface is melted to be smooth. CONSTITUTION:The first opening is made to the SiO2 film 2 on the Si substrate, P treatment is performed and after Na ion in the film 2 is removed, BPSG 3 is piled. Next, the second opening is made with the same mask. In this case, different from the conventional method, BPSG is not annealed, which has different etching ratio from SiO2, and taper is easily formed. Then, the opening is melted smoothly. In this constitution, the conventional BPSG annealing process is omitted, which enable working process to curtail remarkably.
JP3398880A 1980-03-19 1980-03-19 Manufacture of semiconductor element Pending JPS56131948A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3398880A JPS56131948A (en) 1980-03-19 1980-03-19 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3398880A JPS56131948A (en) 1980-03-19 1980-03-19 Manufacture of semiconductor element

Publications (1)

Publication Number Publication Date
JPS56131948A true JPS56131948A (en) 1981-10-15

Family

ID=12401854

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3398880A Pending JPS56131948A (en) 1980-03-19 1980-03-19 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPS56131948A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153147A (en) * 1984-01-20 1985-08-12 Nec Corp Semiconductor device
JPS62274641A (en) * 1986-05-22 1987-11-28 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPS63111668A (en) * 1986-10-30 1988-05-16 Mitsubishi Electric Corp Semiconductor device and manufacture of the same
US5269880A (en) * 1992-04-03 1993-12-14 Northern Telecom Limited Tapering sidewalls of via holes

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60153147A (en) * 1984-01-20 1985-08-12 Nec Corp Semiconductor device
JPS62274641A (en) * 1986-05-22 1987-11-28 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPS63111668A (en) * 1986-10-30 1988-05-16 Mitsubishi Electric Corp Semiconductor device and manufacture of the same
US5269880A (en) * 1992-04-03 1993-12-14 Northern Telecom Limited Tapering sidewalls of via holes

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