JPS56112739A - Inspection of semiconductor substrate - Google Patents

Inspection of semiconductor substrate

Info

Publication number
JPS56112739A
JPS56112739A JP1625880A JP1625880A JPS56112739A JP S56112739 A JPS56112739 A JP S56112739A JP 1625880 A JP1625880 A JP 1625880A JP 1625880 A JP1625880 A JP 1625880A JP S56112739 A JPS56112739 A JP S56112739A
Authority
JP
Japan
Prior art keywords
substrate
semi
insulating
film
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1625880A
Other languages
Japanese (ja)
Other versions
JPS6249985B2 (en
Inventor
Hideki Yakida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1625880A priority Critical patent/JPS56112739A/en
Publication of JPS56112739A publication Critical patent/JPS56112739A/en
Publication of JPS6249985B2 publication Critical patent/JPS6249985B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)

Abstract

PURPOSE:To accurately evaulate the semi-insulating substrate by injecting ions not electrically activated into the substrate, heat treating it, removing the ion injected region by etching and determining whether the new surface is semi-insulating or not. CONSTITUTION:The ions 2 not electrically activated are injected to the semi-insulating GaAs crystalline substrate 1 in the substrate formed, for example, of Ar, and a lattice fault region 3 is formed on the surface of the substrate. In order to prevent the external diffusion of the As from the substrate 1, an Si3N4 film 4 is covered as a protective film thereon, heat treated, then the film is removed, is etched, and the etched part 6 of the substate 1 is formed with the lattice fault region 5. The etching process at this time depends upon the ion injecting conditions. It is inspected whether the new surface thus formed is semi-insulating or not so as to accurately evaluate the propriety of the substrate.
JP1625880A 1980-02-12 1980-02-12 Inspection of semiconductor substrate Granted JPS56112739A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1625880A JPS56112739A (en) 1980-02-12 1980-02-12 Inspection of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1625880A JPS56112739A (en) 1980-02-12 1980-02-12 Inspection of semiconductor substrate

Publications (2)

Publication Number Publication Date
JPS56112739A true JPS56112739A (en) 1981-09-05
JPS6249985B2 JPS6249985B2 (en) 1987-10-22

Family

ID=11911530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1625880A Granted JPS56112739A (en) 1980-02-12 1980-02-12 Inspection of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS56112739A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01257439A (en) * 1987-07-17 1989-10-13 Nippon Flour Mills Co Ltd Cooking of pasta and noodle and heat-resistant package for cooking same and packaged noodle
JPH01202266A (en) * 1988-01-28 1989-08-15 Borden Inc Seasoned pasta product prepared by one step

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53106571A (en) * 1977-02-28 1978-09-16 Nec Corp Testing method of galllium aresenide semi-insulating substrate

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53106571A (en) * 1977-02-28 1978-09-16 Nec Corp Testing method of galllium aresenide semi-insulating substrate

Also Published As

Publication number Publication date
JPS6249985B2 (en) 1987-10-22

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